From: Nicholas Piggin Date: Fri, 18 Feb 2022 07:34:14 +0000 (+0100) Subject: target/ppc: raise HV interrupts for partition table entry problems X-Git-Tag: v7.0.0-rc0~48^2~35 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=4ffcef2a88b4a92c15db00d2cd802ab0950829a4;p=thirdparty%2Fqemu.git target/ppc: raise HV interrupts for partition table entry problems Invalid or missing partition table entry exceptions should cause HV interrupts. HDSISR is set to bad MMU config, which is consistent with the ISA and experimentally matches what POWER9 generates. Reviewed-by: Fabiano Rosas Reviewed-by: Daniel Henrique Barboza Signed-off-by: Nicholas Piggin [ clg: checkpatch fixes ] Message-Id: <20220216102545.1808018-2-npiggin@gmail.com> Signed-off-by: Cédric Le Goater --- diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index d4e16bd7db5..27449490324 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -556,13 +556,15 @@ static bool ppc_radix64_xlate_impl(PowerPCCPU *cpu, vaddr eaddr, } else { if (!ppc64_v3_get_pate(cpu, lpid, &pate)) { if (guest_visible) { - ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_NOPTE); + ppc_radix64_raise_hsi(cpu, access_type, eaddr, eaddr, + DSISR_R_BADCONFIG); } return false; } if (!validate_pate(cpu, lpid, &pate)) { if (guest_visible) { - ppc_radix64_raise_si(cpu, access_type, eaddr, DSISR_R_BADCONFIG); + ppc_radix64_raise_hsi(cpu, access_type, eaddr, eaddr, + DSISR_R_BADCONFIG); } return false; }