From: Etienne Carriere <etienne.carriere@foss.st.com>
Date: Mon, 10 Jul 2023 15:05:15 +0000 (+0200)
Subject: ARM: dts: stm32: leverage OP-TEE ASync notif on STM32MP13x Soc family
X-Git-Tag: v6.6-rc1~130^2~10^2~21
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5060e27012f7e0044ae838de59a46f563c54fb84;p=thirdparty%2Fkernel%2Fstable.git

ARM: dts: stm32: leverage OP-TEE ASync notif on STM32MP13x Soc family

Enables use of GIC PPI#15 for OP-TEE asynchronous notifications
on stm32mp13 platforms.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
---

diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
index d23bbc3639df3..672f3b7735a25 100644
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -33,6 +33,8 @@
 		optee {
 			method = "smc";
 			compatible = "linaro,optee-tz";
+			interrupt-parent = <&intc>;
+			interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
 		};
 
 		scmi: scmi {