From: James E Wilson <wilson@specifixinc.com>
Date: Sat, 8 Oct 2005 00:22:20 +0000 (-0700)
Subject: Fix typo in IA-64 options docs.
X-Git-Tag: releases/gcc-3.4.5~154
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=50a719c4f83a161cf2313cc8710b71ab00d58df2;p=thirdparty%2Fgcc.git

Fix typo in IA-64 options docs.

PR target/23644
* doc/invoke.texi (IA-64 Options, item -mtune): Renamed from
-mtune-arch.

From-SVN: r105111
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 50a1af09847d..ecebacdd2e17 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2005-10-07  James E Wilson  <wilson@specifix.com>
+
+	PR target/23644
+	* doc/invoke.texi (IA-64 Options, item -mtune): Renamed from
+	-mtune-arch.
+
 2005-10-01  Richard Earnshaw  <richard.earnshaw@arm.com>
 
 	PR target/23985
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 7d3afae0231f..e683d0c97d40 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -10078,8 +10078,8 @@ specified separated by a comma.
 Specify bit size of immediate TLS offsets.  Valid values are 14, 22, and
 64.
 
-@item -mtune-arch=@var{cpu-type}
-@opindex mtune-arch
+@item -mtune=@var{cpu-type}
+@opindex mtune
 Tune the instruction scheduling for a particular CPU, Valid values are
 itanium, itanium1, merced, itanium2, and mckinley.