From: Mark Wielaard Date: Thu, 15 Sep 2016 20:59:03 +0000 (+0200) Subject: Merge tag 'elfutils-0.167' into mjw/RH-DTS X-Git-Tag: dts-0.168~5 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=51928153ab88f1816a39c5eaf75dc045e08e50c6;p=thirdparty%2Felfutils.git Merge tag 'elfutils-0.167' into mjw/RH-DTS elfutils 0.167 release Conflicts: libebl/eblopenbackend.c src/Makefile.am tests/Makefile.am tests/run-readelf-A.sh --- 51928153ab88f1816a39c5eaf75dc045e08e50c6 diff --cc backends/Makefile.am index 695694a22,b553ec34c..54ddd78f0 --- a/backends/Makefile.am +++ b/backends/Makefile.am @@@ -37,40 -37,15 +37,41 @@@ modules = i386 sh x86_64 ia64 alpha ar libebl_pic = libebl_i386_pic.a libebl_sh_pic.a libebl_x86_64_pic.a \ libebl_ia64_pic.a libebl_alpha_pic.a libebl_arm_pic.a \ libebl_aarch64_pic.a libebl_sparc_pic.a libebl_ppc_pic.a \ - libebl_ppc64_pic.a libebl_s390_pic.a libebl_tilegx_pic.a + libebl_ppc64_pic.a libebl_s390_pic.a libebl_tilegx_pic.a \ + libebl_m68k_pic.a libebl_bpf_pic.a noinst_LIBRARIES = $(libebl_pic) noinst_DATA = $(libebl_pic:_pic.a=.so) +lib_LIBRARIES = libebl_static_pic.a libelf = ../libelf/libelf.so libdw = ../libdw/libdw.so +# The following is minimal set of backends that we link with libdw to +# avoid dlopen. Note repeats files below because some backends reuse +# each others files. +static_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \ + i386_retval.c i386_regs.c i386_auxv.c i386_syscall.c \ + i386_initreg.c \ + x86_64_init.c x86_64_symbol.c x86_64_corenote.c x86_64_cfi.c \ + x86_64_retval.c x86_64_regs.c x86_64_syscall.c \ + x86_64_initreg.c x32_corenote.c \ + ia64_init.c ia64_symbol.c ia64_regs.c ia64_retval.c \ + aarch64_init.c aarch64_regs.c aarch64_symbol.c \ + aarch64_corenote.c aarch64_retval.c aarch64_cfi.c \ + aarch64_initreg.c \ + ppc_init.c ppc_symbol.c ppc_retval.c ppc_regs.c \ + ppc_corenote.c ppc_auxv.c ppc_attrs.c ppc_syscall.c \ + ppc_cfi.c ppc_initreg.c \ + ppc64_init.c ppc64_symbol.c ppc64_retval.c ppc64_corenote.c \ + ppc64_resolve_sym.c \ + s390_init.c s390_symbol.c s390_regs.c s390_retval.c \ + s390_corenote.c s390x_corenote.c s390_cfi.c s390_initreg.c \ - s390_unwind.c ++ s390_unwind.c bpf_init.c bpf_regs.c + +libebl_static_pic_a_SOURCES = $(static_SRCS) +am_libebl_static_pic_a_OBJECTS = $(static_SRCS:.c=.os) + i386_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \ i386_retval.c i386_regs.c i386_auxv.c i386_syscall.c \ i386_initreg.c diff --cc libdwelf/Makefile.am index 44d866aca,7ca767a9e..74a0042a4 --- a/libdwelf/Makefile.am +++ b/libdwelf/Makefile.am @@@ -39,9 -39,9 +39,10 @@@ noinst_LIBRARIES = libdwelf.a libdwelf_ pkginclude_HEADERS = libdwelf.h noinst_HEADERS = libdwelfP.h +libdwelf_a_CFLAGS = -fpic -fvisibility=hidden $(AM_CFLAGS) libdwelf_a_SOURCES = dwelf_elf_gnu_debuglink.c dwelf_dwarf_gnu_debugaltlink.c \ - dwelf_elf_gnu_build_id.c dwelf_scn_gnu_compressed_size.c + dwelf_elf_gnu_build_id.c dwelf_scn_gnu_compressed_size.c \ + dwelf_strtab.c libdwelf = $(libdw) diff --cc libebl/eblopenbackend.c index 5aec99e04,aa75b9570..4259dbe59 --- a/libebl/eblopenbackend.c +++ b/libebl/eblopenbackend.c @@@ -41,13 -41,6 +41,14 @@@ #include +const char *i386_init (Elf *elf, GElf_Half machine, Ebl *eh, size_t ehlen); +const char *x86_64_init (Elf *elf, GElf_Half machine, Ebl *eh, size_t ehlen); +const char *ppc_init (Elf *elf, GElf_Half machine, Ebl *eh, size_t ehlen); +const char *ppc64_init (Elf *elf, GElf_Half machine, Ebl *eh, size_t ehlen); +const char *ia64_init (Elf *elf, GElf_Half machine, Ebl *eh, size_t ehlen); +const char *s390_init (Elf *elf, GElf_Half machine, Ebl *eh, size_t ehlen); +const char *aarch64_init (Elf *elf, GElf_Half machine, Ebl *eh, size_t ehlen); ++const char *bpf_init (Elf *elf, GElf_Half machine, Ebl *eh, size_t ehlen); /* This table should contain the complete list of architectures as far as the ELF specification is concerned. */ @@@ -64,81 -57,82 +65,82 @@@ static const struc int data; } machines[] = { - { "i386", "elf_i386", "i386", 4, EM_386, ELFCLASS32, ELFDATA2LSB }, - { "ia64", "elf_ia64", "ia64", 4, EM_IA_64, ELFCLASS64, ELFDATA2LSB }, - { "alpha", "elf_alpha", "alpha", 5, EM_ALPHA, ELFCLASS64, ELFDATA2LSB }, - { "x86_64", "elf_x86_64", "x86_64", 6, EM_X86_64, ELFCLASS64, ELFDATA2LSB }, - { "ppc", "elf_ppc", "ppc", 3, EM_PPC, ELFCLASS32, ELFDATA2MSB }, - { "ppc64", "elf_ppc64", "ppc64", 5, EM_PPC64, ELFCLASS64, ELFDATA2MSB }, - { "tilegx", "elf_tilegx", "tilegx", 6, EM_TILEGX, ELFCLASS64, ELFDATA2LSB }, + { i386_init, "elf_i386", "i386", 4, EM_386, ELFCLASS32, ELFDATA2LSB }, + { ia64_init, "elf_ia64", "ia64", 4, EM_IA_64, ELFCLASS64, ELFDATA2LSB }, + { NULL, "elf_alpha", "alpha", 5, EM_ALPHA, ELFCLASS64, ELFDATA2LSB }, + { x86_64_init, "elf_x86_64", "x86_64", 6, EM_X86_64, ELFCLASS64, ELFDATA2LSB }, + { ppc_init, "elf_ppc", "ppc", 3, EM_PPC, ELFCLASS32, ELFDATA2MSB }, + { ppc64_init, "elf_ppc64", "ppc64", 5, EM_PPC64, ELFCLASS64, ELFDATA2MSB }, + { NULL, "elf_tilegx", "tilegx", 6, EM_TILEGX, ELFCLASS64, ELFDATA2LSB }, // XXX class and machine fields need to be filled in for all archs. - { "sh", "elf_sh", "sh", 2, EM_SH, 0, 0 }, - { "arm", "ebl_arm", "arm", 3, EM_ARM, 0, 0 }, - { "sparc", "elf_sparcv9", "sparc", 5, EM_SPARCV9, 0, 0 }, - { "sparc", "elf_sparc", "sparc", 5, EM_SPARC, 0, 0 }, - { "sparc", "elf_sparcv8plus", "sparc", 5, EM_SPARC32PLUS, 0, 0 }, - { "s390", "ebl_s390", "s390", 4, EM_S390, 0, 0 }, - - { "m32", "elf_m32", "m32", 3, EM_M32, 0, 0 }, - { "m68k", "elf_m68k", "m68k", 4, EM_68K, ELFCLASS32, ELFDATA2MSB }, - { "m88k", "elf_m88k", "m88k", 4, EM_88K, 0, 0 }, - { "i860", "elf_i860", "i860", 4, EM_860, 0, 0 }, - { "s370", "ebl_s370", "s370", 4, EM_S370, 0, 0 }, - { "parisc", "elf_parisc", "parisc", 6, EM_PARISC, 0, 0 }, - { "vpp500", "elf_vpp500", "vpp500", 5, EM_VPP500, 0, 0 }, - { "sparc", "elf_v8plus", "v8plus", 6, EM_SPARC32PLUS, 0, 0 }, - { "i960", "elf_i960", "i960", 4, EM_960, 0, 0 }, - { "v800", "ebl_v800", "v800", 4, EM_V800, 0, 0 }, - { "fr20", "ebl_fr20", "fr20", 4, EM_FR20, 0, 0 }, - { "rh32", "ebl_rh32", "rh32", 4, EM_RH32, 0, 0 }, - { "rce", "ebl_rce", "rce", 3, EM_RCE, 0, 0 }, - { "tricore", "elf_tricore", "tricore", 7, EM_TRICORE, 0, 0 }, - { "arc", "elf_arc", "arc", 3, EM_ARC, 0, 0 }, - { "h8", "elf_h8_300", "h8_300", 6, EM_H8_300, 0, 0 }, - { "h8", "elf_h8_300h", "h8_300h", 6, EM_H8_300H, 0, 0 }, - { "h8", "elf_h8s", "h8s", 6, EM_H8S, 0, 0 }, - { "h8", "elf_h8_500", "h8_500", 6, EM_H8_500, 0, 0 }, - { "coldfire", "elf_coldfire", "coldfire", 8, EM_COLDFIRE, 0, 0 }, - { "m68k", "elf_68hc12", "68hc12", 6, EM_68HC12, 0, 0 }, - { "mma", "elf_mma", "mma", 3, EM_MMA, 0, 0 }, - { "pcp", "elf_pcp", "pcp", 3, EM_PCP, 0, 0 }, - { "ncpu", "elf_ncpu", "ncpu", 4, EM_NCPU, 0, 0 }, - { "ndr1", "elf_ndr1", "ndr1", 4, EM_NDR1, 0, 0 }, - { "starcore", "elf_starcore", "starcore", 8, EM_STARCORE, 0, 0 }, - { "me16", "elf_me16", "em16", 4, EM_ME16, 0, 0 }, - { "st100", "elf_st100", "st100", 5, EM_ST100, 0, 0 }, - { "tinyj", "elf_tinyj", "tinyj", 5, EM_TINYJ, 0, 0 }, - { "pdsp", "elf_pdsp", "pdsp", 4, EM_PDSP, 0, 0 }, - { "fx66", "elf_fx66", "fx66", 4, EM_FX66, 0, 0 }, - { "st9plus", "elf_st9plus", "st9plus", 7, EM_ST9PLUS, 0, 0 }, - { "st7", "elf_st7", "st7", 3, EM_ST7, 0, 0 }, - { "m68k", "elf_68hc16", "68hc16", 6, EM_68HC16, 0, 0 }, - { "m68k", "elf_68hc11", "68hc11", 6, EM_68HC11, 0, 0 }, - { "m68k", "elf_68hc08", "68hc08", 6, EM_68HC08, 0, 0 }, - { "m68k", "elf_68hc05", "68hc05", 6, EM_68HC05, 0, 0 }, - { "svx", "elf_svx", "svx", 3, EM_SVX, 0, 0 }, - { "st19", "elf_st19", "st19", 4, EM_ST19, 0, 0 }, - { "vax", "elf_vax", "vax", 3, EM_VAX, 0, 0 }, - { "cris", "elf_cris", "cris", 4, EM_CRIS, 0, 0 }, - { "javelin", "elf_javelin", "javelin", 7, EM_JAVELIN, 0, 0 }, - { "firepath", "elf_firepath", "firepath", 8, EM_FIREPATH, 0, 0 }, - { "zsp", "elf_zsp", "zsp", 3, EM_ZSP, 0, 0 }, - { "mmix", "elf_mmix", "mmix", 4, EM_MMIX, 0, 0 }, - { "hunay", "elf_huany", "huany", 5, EM_HUANY, 0, 0 }, - { "prism", "elf_prism", "prism", 5, EM_PRISM, 0, 0 }, - { "avr", "elf_avr", "avr", 3, EM_AVR, 0, 0 }, - { "fr30", "elf_fr30", "fr30", 4, EM_FR30, 0, 0 }, - { "dv10", "elf_dv10", "dv10", 4, EM_D10V, 0, 0 }, - { "dv30", "elf_dv30", "dv30", 4, EM_D30V, 0, 0 }, - { "v850", "elf_v850", "v850", 4, EM_V850, 0, 0 }, - { "m32r", "elf_m32r", "m32r", 4, EM_M32R, 0, 0 }, - { "mn10300", "elf_mn10300", "mn10300", 7, EM_MN10300, 0, 0 }, - { "mn10200", "elf_mn10200", "mn10200", 7, EM_MN10200, 0, 0 }, - { "pj", "elf_pj", "pj", 2, EM_PJ, 0, 0 }, - { "openrisc", "elf_openrisc", "openrisc", 8, EM_OPENRISC, 0, 0 }, - { "arc", "elf_arc_a5", "arc_a5", 6, EM_ARC_A5, 0, 0 }, - { "xtensa", "elf_xtensa", "xtensa", 6, EM_XTENSA, 0, 0 }, - { "aarch64", "elf_aarch64", "aarch64", 7, EM_AARCH64, ELFCLASS64, 0 }, - { "bpf", "elf_bpf", "bpf", 3, EM_BPF, 0, 0 }, + { NULL, "elf_sh", "sh", 2, EM_SH, 0, 0 }, + { NULL, "ebl_arm", "arm", 3, EM_ARM, 0, 0 }, + { NULL, "elf_sparcv9", "sparc", 5, EM_SPARCV9, 0, 0 }, + { NULL, "elf_sparc", "sparc", 5, EM_SPARC, 0, 0 }, + { NULL, "elf_sparcv8plus", "sparc", 5, EM_SPARC32PLUS, 0, 0 }, + { s390_init, "ebl_s390", "s390", 4, EM_S390, 0, 0 }, + + { NULL, "elf_m32", "m32", 3, EM_M32, 0, 0 }, - { NULL, "elf_m68k", "m68k", 4, EM_68K, 0, 0 }, ++ { NULL, "elf_m68k", "m68k", 4, EM_68K, ELFCLASS32, ELFDATA2MSB }, + { NULL, "elf_m88k", "m88k", 4, EM_88K, 0, 0 }, + { NULL, "elf_i860", "i860", 4, EM_860, 0, 0 }, + { NULL, "ebl_s370", "s370", 4, EM_S370, 0, 0 }, + { NULL, "elf_parisc", "parisc", 6, EM_PARISC, 0, 0 }, + { NULL, "elf_vpp500", "vpp500", 5, EM_VPP500, 0, 0 }, + { NULL, "elf_v8plus", "v8plus", 6, EM_SPARC32PLUS, 0, 0 }, + { NULL, "elf_i960", "i960", 4, EM_960, 0, 0 }, + { NULL, "ebl_v800", "v800", 4, EM_V800, 0, 0 }, + { NULL, "ebl_fr20", "fr20", 4, EM_FR20, 0, 0 }, + { NULL, "ebl_rh32", "rh32", 4, EM_RH32, 0, 0 }, + { NULL, "ebl_rce", "rce", 3, EM_RCE, 0, 0 }, + { NULL, "elf_tricore", "tricore", 7, EM_TRICORE, 0, 0 }, + { NULL, "elf_arc", "arc", 3, EM_ARC, 0, 0 }, + { NULL, "elf_h8_300", "h8_300", 6, EM_H8_300, 0, 0 }, + { NULL, "elf_h8_300h", "h8_300h", 6, EM_H8_300H, 0, 0 }, + { NULL, "elf_h8s", "h8s", 6, EM_H8S, 0, 0 }, + { NULL, "elf_h8_500", "h8_500", 6, EM_H8_500, 0, 0 }, + { NULL, "elf_coldfire", "coldfire", 8, EM_COLDFIRE, 0, 0 }, + { NULL, "elf_68hc12", "68hc12", 6, EM_68HC12, 0, 0 }, + { NULL, "elf_mma", "mma", 3, EM_MMA, 0, 0 }, + { NULL, "elf_pcp", "pcp", 3, EM_PCP, 0, 0 }, + { NULL, "elf_ncpu", "ncpu", 4, EM_NCPU, 0, 0 }, + { NULL, "elf_ndr1", "ndr1", 4, EM_NDR1, 0, 0 }, + { NULL, "elf_starcore", "starcore", 8, EM_STARCORE, 0, 0 }, + { NULL, "elf_me16", "em16", 4, EM_ME16, 0, 0 }, + { NULL, "elf_st100", "st100", 5, EM_ST100, 0, 0 }, + { NULL, "elf_tinyj", "tinyj", 5, EM_TINYJ, 0, 0 }, + { NULL, "elf_pdsp", "pdsp", 4, EM_PDSP, 0, 0 }, + { NULL, "elf_fx66", "fx66", 4, EM_FX66, 0, 0 }, + { NULL, "elf_st9plus", "st9plus", 7, EM_ST9PLUS, 0, 0 }, + { NULL, "elf_st7", "st7", 3, EM_ST7, 0, 0 }, + { NULL, "elf_68hc16", "68hc16", 6, EM_68HC16, 0, 0 }, + { NULL, "elf_68hc11", "68hc11", 6, EM_68HC11, 0, 0 }, + { NULL, "elf_68hc08", "68hc08", 6, EM_68HC08, 0, 0 }, + { NULL, "elf_68hc05", "68hc05", 6, EM_68HC05, 0, 0 }, + { NULL, "elf_svx", "svx", 3, EM_SVX, 0, 0 }, + { NULL, "elf_st19", "st19", 4, EM_ST19, 0, 0 }, + { NULL, "elf_vax", "vax", 3, EM_VAX, 0, 0 }, + { NULL, "elf_cris", "cris", 4, EM_CRIS, 0, 0 }, + { NULL, "elf_javelin", "javelin", 7, EM_JAVELIN, 0, 0 }, + { NULL, "elf_firepath", "firepath", 8, EM_FIREPATH, 0, 0 }, + { NULL, "elf_zsp", "zsp", 3, EM_ZSP, 0, 0 }, + { NULL, "elf_mmix", "mmix", 4, EM_MMIX, 0, 0 }, + { NULL, "elf_huany", "huany", 5, EM_HUANY, 0, 0 }, + { NULL, "elf_prism", "prism", 5, EM_PRISM, 0, 0 }, + { NULL, "elf_avr", "avr", 3, EM_AVR, 0, 0 }, + { NULL, "elf_fr30", "fr30", 4, EM_FR30, 0, 0 }, + { NULL, "elf_dv10", "dv10", 4, EM_D10V, 0, 0 }, + { NULL, "elf_dv30", "dv30", 4, EM_D30V, 0, 0 }, + { NULL, "elf_v850", "v850", 4, EM_V850, 0, 0 }, + { NULL, "elf_m32r", "m32r", 4, EM_M32R, 0, 0 }, + { NULL, "elf_mn10300", "mn10300", 7, EM_MN10300, 0, 0 }, + { NULL, "elf_mn10200", "mn10200", 7, EM_MN10200, 0, 0 }, + { NULL, "elf_pj", "pj", 2, EM_PJ, 0, 0 }, + { NULL, "elf_openrisc", "openrisc", 8, EM_OPENRISC, 0, 0 }, + { NULL, "elf_arc_a5", "arc_a5", 6, EM_ARC_A5, 0, 0 }, + { NULL, "elf_xtensa", "xtensa", 6, EM_XTENSA, 0, 0 }, + { aarch64_init, "elf_aarch64", "aarch64", 7, EM_AARCH64, ELFCLASS64, 0 }, ++ { bpf_init, "elf_bpf", "bpf", 3, EM_BPF, 0, 0 }, }; #define nmachines (sizeof (machines) / sizeof (machines[0])) diff --cc src/Makefile.am index 9f69956e7,9bb476511..deba8dcad --- a/src/Makefile.am +++ b/src/Makefile.am @@@ -110,18 -71,12 +73,12 @@@ readelf_LDADD = $(libdw) $(libebl) $(li nm_LDADD = $(libdw) $(libebl) $(libelf) $(libeu) $(argp_LDADD) -ldl \ $(demanglelib) size_LDADD = $(libelf) $(libeu) $(argp_LDADD) - strip_LDADD = $(libebl) $(libdw_static) $(libelf) $(libeu) $(argp_LDADD) -ldl - ld_LDADD = $(libebl) $(libdw_static) $(libelf) $(libeu) $(argp_LDADD) -ldl - if NATIVE_LD - # -ldl is always needed for libebl. - ld_LDADD += libld_elf.a - endif - ld_LDFLAGS = -rdynamic -strip_LDADD = $(libebl) $(libelf) $(libdw) $(libeu) $(argp_LDADD) -ldl -elflint_LDADD = $(libebl) $(libelf) $(libeu) $(argp_LDADD) -ldl ++strip_LDADD = $(libebl) $(libdw) $(libelf) $(libeu) $(argp_LDADD) -ldl +elflint_LDADD = $(libebl) $(libdw_static) $(libelf) $(libeu) $(argp_LDADD) -ldl findtextrel_LDADD = $(libdw) $(libelf) $(argp_LDADD) addr2line_LDADD = $(libdw) $(libelf) $(argp_LDADD) $(demanglelib) -elfcmp_LDADD = $(libebl) $(libelf) $(argp_LDADD) -ldl -objdump_LDADD = $(libasm) $(libebl) $(libelf) $(libeu) $(argp_LDADD) -ldl +elfcmp_LDADD = $(libebl) $(libdw_static) $(libelf) $(argp_LDADD) -ldl +objdump_LDADD = $(libasm) $(libebl) $(libdw_static) $(libelf) $(libeu) $(argp_LDADD) -ldl ranlib_LDADD = libar.a $(libelf) $(libeu) $(argp_LDADD) strings_LDADD = $(libelf) $(libeu) $(argp_LDADD) ar_LDADD = libar.a $(libelf) $(libeu) $(argp_LDADD) diff --cc tests/run-allregs.sh index 544c75945,d82f37e6d..a56e6126d --- a/tests/run-allregs.sh +++ b/tests/run-allregs.sh @@@ -2489,4 -2870,36 +2489,5 @@@ x87 registers 39: %st6 (st6), float 80 bits 40: %st7 (st7), float 80 bits EOF + -# See run-readelf-mixed-corenote.sh for instructions to regenerate -# this core file. -regs_test testfile-m68k-core <<\EOF -integer registers: - 0: %d0 (d0), signed 32 bits - 1: %d1 (d1), signed 32 bits - 2: %d2 (d2), signed 32 bits - 3: %d3 (d3), signed 32 bits - 4: %d4 (d4), signed 32 bits - 5: %d5 (d5), signed 32 bits - 6: %d6 (d6), signed 32 bits - 7: %d7 (d7), signed 32 bits - 8: %a0 (a0), address 32 bits - 9: %a1 (a1), address 32 bits - 10: %a2 (a2), address 32 bits - 11: %a3 (a3), address 32 bits - 12: %a4 (a4), address 32 bits - 13: %a5 (a5), address 32 bits - 14: %a6 (a6), address 32 bits - 15: %a7 (a7), address 32 bits - 24: %pc (pc), address 32 bits -FPU registers: - 16: %fp0 (fp0), float 96 bits - 17: %fp1 (fp1), float 96 bits - 18: %fp2 (fp2), float 96 bits - 19: %fp3 (fp3), float 96 bits - 20: %fp4 (fp4), float 96 bits - 21: %fp5 (fp5), float 96 bits - 22: %fp6 (fp6), float 96 bits - 23: %fp7 (fp7), float 96 bits -EOF exit 0