From: Pan Li Date: Fri, 8 Dec 2023 06:48:48 +0000 (+0800) Subject: RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE X-Git-Tag: basepoints/gcc-15~3830 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=51b8259212791dbea846706bc5e9db5310f1fc10;p=thirdparty%2Fgcc.git RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE The mode attr V_F2DI_CONVERT_BRIDGE converts the floating-point mode to the widden floating-point by design. But we take (RVVM1HF "RVVM2SI") by mistake. This patch would like to fix it by replacing the (RVVM1HF "RVVM2SI") to (RVVM1HF "RVVM2SF") as design. gcc/ChangeLog: * config/riscv/vector-iterators.md: Replace RVVM2SI to RVVM2SF for mode attr V_F2DI_CONVERT_BRIDGE. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c: New test. Signed-off-by: Pan Li --- diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 56080ed1f5f8..5f5f7b5b986f 100644 --- a/gcc/config/riscv/vector-iterators.md +++ b/gcc/config/riscv/vector-iterators.md @@ -3267,7 +3267,7 @@ ]) (define_mode_attr V_F2DI_CONVERT_BRIDGE [ - (RVVM2HF "RVVM4SF") (RVVM1HF "RVVM2SI") (RVVMF2HF "RVVM1SF") + (RVVM2HF "RVVM4SF") (RVVM1HF "RVVM2SF") (RVVMF2HF "RVVM1SF") (RVVMF4HF "RVVMF2SF") (RVVM4SF "VOID") (RVVM2SF "VOID") (RVVM1SF "VOID") diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c new file mode 100644 index 000000000000..5fb61c7b44c5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c @@ -0,0 +1,7 @@ +/* Test that we do not have ice when compile */ +/* { dg-do compile } */ +/* { dg-options "--param=riscv-autovec-lmul=m4 -march=rv64gcv_zvfh_zfh -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "test-math.h" + +TEST_UNARY_CALL_CVT (_Float16, long, __builtin_lroundf16)