From: Uros Bizjak Date: Sun, 23 Oct 2011 15:19:06 +0000 (+0200) Subject: re PR target/50788 (ICE: in merge_overlapping_regs, at regrename.c:318 with -mavx... X-Git-Tag: releases/gcc-4.4.7~199 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=51d76d54d2516f52bad72bba949caf91308062ba;p=thirdparty%2Fgcc.git re PR target/50788 (ICE: in merge_overlapping_regs, at regrename.c:318 with -mavx -fpeel-loops -fstack-protector-all and __builtin_ia32_maskloadpd256) PR target/50788 * config/i386/sse.md (avx_maskload): Remove (match_dup 0). testsuite/ChangeLog: PR target/50788 * gcc.target/i386/pr50788.c: New test. From-SVN: r180339 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2a55007f2b1f..21cb741228ed 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-10-23 Uros Bizjak + + PR target/50788 + * config/i386/sse.md (avx_maskload): + Remove (match_dup 0). + 2011-10-18 Uros Bizjak Eric Botcazou diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index d6c5c4b45c78..afe2b700a164 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -11674,8 +11674,7 @@ [(set (match_operand:AVXMODEF2P 0 "register_operand" "=x") (unspec:AVXMODEF2P [(match_operand:AVXMODEF2P 1 "memory_operand" "m") - (match_operand: 2 "register_operand" "x") - (match_dup 0)] + (match_operand: 2 "register_operand" "x")] UNSPEC_MASKLOAD))] "TARGET_AVX" "vmaskmovp\t{%1, %2, %0|%0, %2, %1}" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c1a4ebeca866..0c59d5ccb4d4 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2011-10-23 Uros Bizjak + + PR target/50788 + * gcc.target/i386/pr50788.c: New test. + 2011-10-19 Jason Merrill PR c++/50793 diff --git a/gcc/testsuite/gcc.target/i386/pr50788.c b/gcc/testsuite/gcc.target/i386/pr50788.c new file mode 100644 index 000000000000..29a19634cc04 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr50788.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx -fpeel-loops -fstack-protector-all" } */ + +typedef long long __m256i __attribute__ ((__vector_size__ (32))); +typedef double __m256d __attribute__ ((__vector_size__ (32))); + +__m256d foo (__m256d *__P, __m256i __M) +{ + return __builtin_ia32_maskloadpd256 ( __P, __M); +}