From: Christophe Lyon Date: Tue, 21 Feb 2023 15:45:27 +0000 (+0000) Subject: arm: [MVE intrinsics] factorize vmovlbq vmovltq X-Git-Tag: basepoints/gcc-15~9444 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=51fca3e13c33cb684cf145c530ff37e9432438f4;p=thirdparty%2Fgcc.git arm: [MVE intrinsics] factorize vmovlbq vmovltq Factorize vmovlbq, vmovltq builtins so that they use the same parameterized names. 2022-10-25 Christophe Lyon gcc/ * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt. (VMOVLBQ, VMOVLTQ): Merge into ... (VMOVLxQ): ... this. (VMOVLTQ_M, VMOVLBQ_M): Merge into ... (VMOVLxQ_M): ... this. * config/arm/mve.md (mve_vmovltq_) (mve_vmovlbq_): Merge into ... (@mve_q_): ... this. (mve_vmovlbq_m_, mve_vmovltq_m_): Merge into ... (@mve_q_m_): ... this. --- diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 84dd97249f95..2f6de937ef7e 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -817,6 +817,10 @@ (VMINVQ_S "vminv") (VMINVQ_U "vminv") (VMLAQ_M_N_S "vmla") (VMLAQ_M_N_U "vmla") (VMLASQ_M_N_S "vmlas") (VMLASQ_M_N_U "vmlas") + (VMOVLBQ_M_S "vmovlb") (VMOVLBQ_M_U "vmovlb") + (VMOVLBQ_S "vmovlb") (VMOVLBQ_U "vmovlb") + (VMOVLTQ_M_S "vmovlt") (VMOVLTQ_M_U "vmovlt") + (VMOVLTQ_S "vmovlt") (VMOVLTQ_U "vmovlt") (VMOVNBQ_M_S "vmovnb") (VMOVNBQ_M_U "vmovnb") (VMOVNBQ_S "vmovnb") (VMOVNBQ_U "vmovnb") (VMOVNTQ_M_S "vmovnt") (VMOVNTQ_M_U "vmovnt") @@ -2318,8 +2322,7 @@ (define_int_iterator VDUPQ_N [VDUPQ_N_U VDUPQ_N_S]) (define_int_iterator VADDVQ [VADDVQ_U VADDVQ_S]) (define_int_iterator VREV32Q [VREV32Q_U VREV32Q_S]) -(define_int_iterator VMOVLBQ [VMOVLBQ_S VMOVLBQ_U]) -(define_int_iterator VMOVLTQ [VMOVLTQ_U VMOVLTQ_S]) +(define_int_iterator VMOVLxQ [VMOVLBQ_S VMOVLBQ_U VMOVLTQ_U VMOVLTQ_S]) (define_int_iterator VCVTPQ [VCVTPQ_S VCVTPQ_U]) (define_int_iterator VCVTNQ [VCVTNQ_S VCVTNQ_U]) (define_int_iterator VCVTMQ [VCVTMQ_S VCVTMQ_U]) @@ -2413,7 +2416,7 @@ (define_int_iterator VSRIQ_N [VSRIQ_N_S VSRIQ_N_U]) (define_int_iterator VMLALDAVQ_P [VMLALDAVQ_P_U VMLALDAVQ_P_S]) (define_int_iterator VQMOVNBQ_M [VQMOVNBQ_M_S VQMOVNBQ_M_U]) -(define_int_iterator VMOVLTQ_M [VMOVLTQ_M_U VMOVLTQ_M_S]) +(define_int_iterator VMOVLxQ_M [VMOVLBQ_M_U VMOVLBQ_M_S VMOVLTQ_M_U VMOVLTQ_M_S]) (define_int_iterator VMOVNBQ_M [VMOVNBQ_M_U VMOVNBQ_M_S]) (define_int_iterator VRSHRNTQ_N [VRSHRNTQ_N_U VRSHRNTQ_N_S]) (define_int_iterator VORRQ_M_N [VORRQ_M_N_S VORRQ_M_N_U]) @@ -2421,7 +2424,6 @@ (define_int_iterator VREV16Q_M [VREV16Q_M_S VREV16Q_M_U]) (define_int_iterator VQRSHRNTQ_N [VQRSHRNTQ_N_U VQRSHRNTQ_N_S]) (define_int_iterator VMOVNTQ_M [VMOVNTQ_M_U VMOVNTQ_M_S]) -(define_int_iterator VMOVLBQ_M [VMOVLBQ_M_U VMOVLBQ_M_S]) (define_int_iterator VMLALDAVAQ [VMLALDAVAQ_S VMLALDAVAQ_U]) (define_int_iterator VQSHRNBQ_N [VQSHRNBQ_N_U VQSHRNBQ_N_S]) (define_int_iterator VSHRNBQ_N [VSHRNBQ_N_U VSHRNBQ_N_S]) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index c5373fef9a23..f5cb8ef48ef7 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -386,30 +386,17 @@ ]) ;; -;; [vmovltq_u, vmovltq_s]) +;; [vmovlbq_s, vmovlbq_u] +;; [vmovltq_u, vmovltq_s] ;; -(define_insn "mve_vmovltq_" - [ - (set (match_operand: 0 "s_register_operand" "=w") - (unspec: [(match_operand:MVE_3 1 "s_register_operand" "w")] - VMOVLTQ)) - ] - "TARGET_HAVE_MVE" - "vmovlt.%# %q0, %q1" - [(set_attr "type" "mve_move") -]) - -;; -;; [vmovlbq_s, vmovlbq_u]) -;; -(define_insn "mve_vmovlbq_" +(define_insn "@mve_q_" [ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand:MVE_3 1 "s_register_operand" "w")] - VMOVLBQ)) + VMOVLxQ)) ] "TARGET_HAVE_MVE" - "vmovlb.%# %q0, %q1" + ".%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -2904,34 +2891,21 @@ "vpst\;vmlsldavxt.s%# %Q0, %R0, %q1, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) + ;; ;; [vmovlbq_m_u, vmovlbq_m_s]) -;; -(define_insn "mve_vmovlbq_m_" - [ - (set (match_operand: 0 "s_register_operand" "=w") - (unspec: [(match_operand: 1 "s_register_operand" "0") - (match_operand:MVE_3 2 "s_register_operand" "w") - (match_operand: 3 "vpr_register_operand" "Up")] - VMOVLBQ_M)) - ] - "TARGET_HAVE_MVE" - "vpst\;vmovlbt.%# %q0, %q2" - [(set_attr "type" "mve_move") - (set_attr "length""8")]) -;; ;; [vmovltq_m_u, vmovltq_m_s]) ;; -(define_insn "mve_vmovltq_m_" +(define_insn "@mve_q_m_" [ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_3 2 "s_register_operand" "w") (match_operand: 3 "vpr_register_operand" "Up")] - VMOVLTQ_M)) + VMOVLxQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;vmovltt.%# %q0, %q2" + "vpst\;t.%#\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")])