From: Yingle Hou <houyingle@hygon.cn>
Date: Thu, 12 Dec 2019 02:58:18 +0000 (+0800)
Subject: cpu: Remove the verification conditions of the model in the x86 signatures
X-Git-Tag: v6.0.0-rc1~306
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=528356f46b6f52cb0134c2b7303822ff52ea521f;p=thirdparty%2Flibvirt.git

cpu: Remove the verification conditions of the model in the x86 signatures

The x86ModelParseSignatures function makes an assumption that CPU signature
model equals 0 as an invalid case. While in Hygon processor definition, A1
version (model 0, stepping 1) is mass production version, to support Hygon
Dhyana A1 version, we have removed CPU signature model zero checking condition.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Yingle Hou <houyingle@hygon.cn>
---

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 1e913cc9fa..9b7981d574 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1418,7 +1418,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model,
         }
 
         rc = virXPathUInt("string(@model)", ctxt, &sigModel);
-        if (rc < 0 || sigModel == 0) {
+        if (rc < 0) {
             virReportError(VIR_ERR_INTERNAL_ERROR,
                            _("Invalid CPU signature model in model %s"),
                            model->name);