From: Adhemerval Zanella Date: Fri, 18 Apr 2025 13:43:36 +0000 (-0300) Subject: aarch64: Fix UB in ifunc resolvers X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=541a425162df71535eca20ae49f26db8e139a5b1;p=thirdparty%2Fglibc.git aarch64: Fix UB in ifunc resolvers When building with ubsan the ifunc resolvers triggers: UBSAN: Undefined behaviour in ../sysdeps/aarch64/multiarch/memchr.c:34:1 left shift of 255 by 24 cannot be represented in type 'int' The midr is defined as uint64_t, so use UINT64_C to define the masks as well. --- diff --git a/sysdeps/aarch64/cpu-features.h b/sysdeps/aarch64/cpu-features.h index ef4e947e8c..a647db10a3 100644 --- a/sysdeps/aarch64/cpu-features.h +++ b/sysdeps/aarch64/cpu-features.h @@ -24,19 +24,19 @@ #include #define MIDR_PARTNUM_SHIFT 4 -#define MIDR_PARTNUM_MASK (0xfff << MIDR_PARTNUM_SHIFT) +#define MIDR_PARTNUM_MASK (UINT64_C(0xfff) << MIDR_PARTNUM_SHIFT) #define MIDR_PARTNUM(midr) \ (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT) #define MIDR_ARCHITECTURE_SHIFT 16 -#define MIDR_ARCHITECTURE_MASK (0xf << MIDR_ARCHITECTURE_SHIFT) +#define MIDR_ARCHITECTURE_MASK (UINT64_C(0xf) << MIDR_ARCHITECTURE_SHIFT) #define MIDR_ARCHITECTURE(midr) \ (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT) #define MIDR_VARIANT_SHIFT 20 -#define MIDR_VARIANT_MASK (0xf << MIDR_VARIANT_SHIFT) +#define MIDR_VARIANT_MASK (UINT64_C(0xf) << MIDR_VARIANT_SHIFT) #define MIDR_VARIANT(midr) \ (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT) #define MIDR_IMPLEMENTOR_SHIFT 24 -#define MIDR_IMPLEMENTOR_MASK (0xff << MIDR_IMPLEMENTOR_SHIFT) +#define MIDR_IMPLEMENTOR_MASK (UINT64_C(0xff) << MIDR_IMPLEMENTOR_SHIFT) #define MIDR_IMPLEMENTOR(midr) \ (((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)