From: Olivier Hainque <hainque@adacore.com>
Date: Sat, 20 Mar 2021 21:10:49 +0000 (+0000)
Subject: [Ada] Fix inaccuracies in signal handler trampoline for aarch64-vxworks
X-Git-Tag: basepoints/gcc-13~6681
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=548280b996ea7e6283193d6c8a3c03d44ef36681;p=thirdparty%2Fgcc.git

[Ada] Fix inaccuracies in signal handler trampoline for aarch64-vxworks

gcc/ada/

	* sigtramp-vxworks-target.inc (__aarch64__): Sync
	REGNO_PC_OFFSET with the back-end DWARF_ALT_FRAME_RETURN_COLUMN.
	In CFI_COMMON_REGS, leave r18 alone, VxWorks private.
---

diff --git a/gcc/ada/sigtramp-vxworks-target.inc b/gcc/ada/sigtramp-vxworks-target.inc
index 13601c6565c2..5a37b8795106 100644
--- a/gcc/ada/sigtramp-vxworks-target.inc
+++ b/gcc/ada/sigtramp-vxworks-target.inc
@@ -100,7 +100,7 @@
 #define FUNCTION "%function"
 
 #ifdef __aarch64__
-#define REGNO_PC_OFFSET  80  /* aka V16, a scratch register */
+#define REGNO_PC_OFFSET  96  /* DWARF_ALT_FRAME_RETURN_COLUMN */
 #else
 #define REGNO_PC_OFFSET  15  /* PC_REGNUM */
 #endif
@@ -375,7 +375,7 @@ TCR(COMMON_CFI(G_REG_OFFSET(14))) \
 TCR(COMMON_CFI(G_REG_OFFSET(15))) \
 TCR(COMMON_CFI(G_REG_OFFSET(16))) \
 TCR(COMMON_CFI(G_REG_OFFSET(17))) \
-TCR(COMMON_CFI(G_REG_OFFSET(18))) \
+CR("# Leave alone R18, VxWorks reserved\n") \
 TCR(COMMON_CFI(G_REG_OFFSET(19))) \
 TCR(COMMON_CFI(G_REG_OFFSET(20))) \
 TCR(COMMON_CFI(G_REG_OFFSET(21))) \