From: Jin Ma Date: Fri, 16 May 2025 07:27:13 +0000 (+0800) Subject: RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute... X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=55cfd1c8fa2ad2c5d91eadd14daa35f695779a2b;p=thirdparty%2Fgcc.git RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once Reported-by: huangcunjian gcc/ChangeLog: * config/riscv/riscv.cc (riscv_gpr_save_operation_p): Remove break and fixbug for elt index. --- diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index fd51472dbea..b2794252291 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -11580,11 +11580,10 @@ riscv_gpr_save_operation_p (rtx op) /* Two CLOBBER and USEs, must check the order. */ unsigned expect_code = i < 3 ? CLOBBER : USE; if (GET_CODE (elt) != expect_code - || !REG_P (XEXP (elt, 1)) - || (REGNO (XEXP (elt, 1)) != gpr_save_reg_order[i])) + || !REG_P (XEXP (elt, 0)) + || (REGNO (XEXP (elt, 0)) != gpr_save_reg_order[i])) return false; } - break; } return true; }