From: Fei Gao <gaofei@eswincomputing.com>
Date: Sat, 3 Jun 2023 17:11:18 +0000 (-0600)
Subject: [RISC-V] fix cfi issue in save-restore.
X-Git-Tag: basepoints/gcc-15~8616
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5681872057f0b725ec8a7c8a1eec8fee205ad673;p=thirdparty%2Fgcc.git

[RISC-V] fix cfi issue in save-restore.

This patch fixes a cfi issue introduced by
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=60524be1e3929d83e15fceac6e2aa053c8a6fb20

Test code:
char my_getchar();
float getf();
int test_f0()
{
  int s0 = my_getchar();
  float f0 = getf();
  int b = my_getchar();
  return f0+s0+b;
}

cflags: -g -Os -march=rv32imafc -mabi=ilp32f -msave-restore -mcmodel=medlow

before patch:
test_f0:
...
	.cfi_startproc
	call	t0,__riscv_save_1
	.cfi_offset 8, -8
	.cfi_offset 1, -4
	.cfi_def_cfa_offset 16
...
	addi	sp,sp,-16
	.cfi_def_cfa_offset 32

...

	addi	sp,sp,16
	.cfi_def_cfa_offset 0  // issue here
...
	tail	__riscv_restore_1
	.cfi_restore 8
	.cfi_restore 1
	.cfi_def_cfa_offset -16 // issue here
	.cfi_endproc

after patch:
test_f0:
...
	.cfi_startproc
	call	t0,__riscv_save_1
	.cfi_offset 8, -8
	.cfi_offset 1, -4
	.cfi_def_cfa_offset 16
...
	addi	sp,sp,-16
	.cfi_def_cfa_offset 32

...

	addi	sp,sp,16
	.cfi_def_cfa_offset 16  // corrected here
...
	tail	__riscv_restore_1
	.cfi_restore 8
	.cfi_restore 1
	.cfi_def_cfa_offset 0 // corrected here
	.cfi_endproc

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
	correct offset.
---

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 85db1e3c86b8..caa7858b864d 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -5652,7 +5652,7 @@ riscv_expand_epilogue (int style)
 					   adjust));
 	  rtx dwarf = NULL_RTX;
 	  rtx cfa_adjust_rtx = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
-					     GEN_INT (step2));
+					     GEN_INT (step2 + libcall_size));
 
 	  dwarf = alloc_reg_note (REG_CFA_DEF_CFA, cfa_adjust_rtx, dwarf);
 	  RTX_FRAME_RELATED_P (insn) = 1;
@@ -5689,7 +5689,7 @@ riscv_expand_epilogue (int style)
 
       rtx dwarf = NULL_RTX;
       rtx cfa_adjust_rtx = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
-					 const0_rtx);
+					 GEN_INT (libcall_size));
       dwarf = alloc_reg_note (REG_CFA_DEF_CFA, cfa_adjust_rtx, dwarf);
       RTX_FRAME_RELATED_P (insn) = 1;