From: Jim Wilson <wilson@cygnus.com>
Date: Tue, 5 May 1998 00:40:04 +0000 (+0000)
Subject: i386.c (output_fix_trunc): Add code to emulate non-popping DImode case.
X-Git-Tag: releases/egcs-1.0.3~4
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=56ef4295eb2e223d89bb4e13bb47cf910b4a3a27;p=thirdparty%2Fgcc.git

i386.c (output_fix_trunc): Add code to emulate non-popping DImode case.

        * i386.c (output_fix_trunc): Add code to emulate non-popping DImode
        case.
Regression fix from Jim.

From-SVN: r19537
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a0777b17f2b4..1355e681da16 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Thu Apr 30 19:28:16 1998  Jim Wilson  <wilson@cygnus.com>
+
+	* i386.c (output_fix_trunc): Add code to emulate non-popping DImode
+	case.
+
 Thu Apr 23 01:41:02 1998  Jeffrey A Law  (law@cygnus.com)
 
 	* version.c: Bump for 1.0.3 pre-release.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index b9b7e5d256f0..8be76dce7de9 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3731,8 +3731,7 @@ output_fix_trunc (insn, operands)
   int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;
   rtx xops[2];
 
-  if (! STACK_TOP_P (operands[1]) ||
-      (GET_MODE (operands[0]) == DImode && ! stack_top_dies))
+  if (! STACK_TOP_P (operands[1]))
     abort ();
 
   xops[0] = GEN_INT (12);
@@ -3750,6 +3749,17 @@ output_fix_trunc (insn, operands)
     {
       if (stack_top_dies)
 	output_asm_insn (AS1 (fistp%z0,%0), operands);
+      else if (GET_MODE (operands[0]) == DImode && ! stack_top_dies)
+	{
+	  /* There is no DImode version of this without a stack pop, so
+	     we must emulate it.  It doesn't matter much what the second
+	     instruction is, because the value being pushed on the FP stack
+	     is not used except for the following stack popping store.
+	     This case can only happen without optimization, so it doesn't
+	     matter that it is inefficient.  */
+	  output_asm_insn (AS1 (fistp%z0,%0), operands);
+	  output_asm_insn (AS1 (fild%z0,%0), operands);
+	}
       else
 	output_asm_insn (AS1 (fist%z0,%0), operands);
     }