From: Jani Nikula Date: Tue, 4 Jun 2024 15:25:30 +0000 (+0300) Subject: drm/i915: pass dev_priv explicitly to TRANS_MULT X-Git-Tag: v6.11-rc1~141^2~20^2~127 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5734c976717d4d7027c387d167c19ba52d3498ed;p=thirdparty%2Fkernel%2Flinux.git drm/i915: pass dev_priv explicitly to TRANS_MULT Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_MULT register macro. Reviewed-by: Rodrigo Vivi Link: https://patchwork.freedesktop.org/patch/msgid/7ea79208a81fd5c3b021bcd8e1f9f90607716d82.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula --- diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 81ae72648e8e8..e7ee4970e306d 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1646,7 +1646,7 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta intel_vrr_set_transcoder_timings(crtc_state); if (cpu_transcoder != TRANSCODER_EDP) - intel_de_write(dev_priv, TRANS_MULT(cpu_transcoder), + intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder), crtc_state->pixel_multiplier - 1); hsw_set_frame_start_delay(crtc_state); @@ -3861,7 +3861,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, !transcoder_is_dsi(pipe_config->cpu_transcoder)) { pipe_config->pixel_multiplier = intel_de_read(dev_priv, - TRANS_MULT(pipe_config->cpu_transcoder)) + 1; + TRANS_MULT(dev_priv, pipe_config->cpu_transcoder)) + 1; } else { pipe_config->pixel_multiplier = 1; } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8e312aa8ca71d..e72be82445ca1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1145,7 +1145,7 @@ #define BCLRPAT(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _BCLRPAT_A) #define TRANS_VSYNCSHIFT(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNCSHIFT_A) #define PIPESRC(dev_priv, pipe) _MMIO_TRANS2(dev_priv, (pipe), _PIPEASRC) -#define TRANS_MULT(trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_MULT_A) +#define TRANS_MULT(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_MULT_A) /* VRR registers */ #define _TRANS_VRR_CTL_A 0x60420 diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index ff561a1e0fd34..600e89148f775 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -506,9 +506,9 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(GAMMA_MODE(PIPE_A)); MMIO_D(GAMMA_MODE(PIPE_B)); MMIO_D(GAMMA_MODE(PIPE_C)); - MMIO_D(TRANS_MULT(TRANSCODER_A)); - MMIO_D(TRANS_MULT(TRANSCODER_B)); - MMIO_D(TRANS_MULT(TRANSCODER_C)); + MMIO_D(TRANS_MULT(dev_priv, TRANSCODER_A)); + MMIO_D(TRANS_MULT(dev_priv, TRANSCODER_B)); + MMIO_D(TRANS_MULT(dev_priv, TRANSCODER_C)); MMIO_D(HSW_TVIDEO_DIP_CTL(dev_priv, TRANSCODER_A)); MMIO_D(HSW_TVIDEO_DIP_CTL(dev_priv, TRANSCODER_B)); MMIO_D(HSW_TVIDEO_DIP_CTL(dev_priv, TRANSCODER_C));