From: Richard Earnshaw <rearnsha@arm.com>
Date: Fri, 18 Jun 2021 16:16:25 +0000 (+0100)
Subject: arm: add erratum mitigation to __gnu_cmse_nonsecure_call [PR102035]
X-Git-Tag: basepoints/gcc-13~5200
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=574e7950bd6b34e9e2cacce18c802b45505d1d0a;p=thirdparty%2Fgcc.git

arm: add erratum mitigation to __gnu_cmse_nonsecure_call [PR102035]

Add the recommended erratum mitigation sequence to
__gnu_cmse_nonsecure_call for use on Armv8-m.main devices. Since this
is in the library code we cannot know in advance whether the core we
are running on will be affected by this, so always enable it.

libgcc:
	PR target/102035
	* config/arm/cmse_nonsecure_call.S (__gnu_cmse_nonsecure_call):
	Add vlldm erratum work-around.
---

diff --git a/libgcc/config/arm/cmse_nonsecure_call.S b/libgcc/config/arm/cmse_nonsecure_call.S
index 00830ade98ea..c8e0fbbe665d 100644
--- a/libgcc/config/arm/cmse_nonsecure_call.S
+++ b/libgcc/config/arm/cmse_nonsecure_call.S
@@ -102,6 +102,11 @@ blxns	    r4
 #ifdef __ARM_PCS_VFP
 vpop.f64    {d8-d15}
 #else
+/* VLLDM erratum mitigation sequence. */
+mrs	    r5, control
+tst	    r5, #8	  /* CONTROL_S.SFPA */
+it	    ne
+.inst.w	    0xeeb00a40	  /* vmovne s0, s0 */
 vlldm	    sp		  /* Lazy restore of d0-d16 and FPSCR.  */
 add	    sp, sp, #0x88 /* Free space used to save floating point registers.  */
 #endif /* __ARM_PCS_VFP */