From: Lucas De Marchi Date: Fri, 6 Oct 2023 18:23:23 +0000 (-0700) Subject: drm/xe/xe2: Add one more bit to encode PAT to ppgtt entries X-Git-Tag: v6.8-rc1~111^2~7^2~310 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5803bdc8ad6f0320b3147de7e565c24b3afe31fb;p=thirdparty%2Flinux.git drm/xe/xe2: Add one more bit to encode PAT to ppgtt entries Xe2 adds one more bit to cover all the possible 32 entries. Although those entries are not used by internal kernel code paths, it's expected that userspace will make use of it. Bspec: 59510, 67095 Reviewed-by: Pallavi Mishra Reviewed-by: Matt Roper Link: https://lore.kernel.org/r/20231006182325.3617685-2-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi Signed-off-by: Rodrigo Vivi --- diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h index 5666fd6d7f11c..ba6ffd359ff70 100644 --- a/drivers/gpu/drm/xe/xe_bo.h +++ b/drivers/gpu/drm/xe/xe_bo.h @@ -49,6 +49,7 @@ #define XE_BO_INTERNAL_64K BIT(31) #define XELPG_PPGTT_PTE_PAT3 BIT_ULL(62) +#define XE2_PPGTT_PTE_PAT4 BIT_ULL(61) #define XE_PPGTT_PTE_PAT2 BIT_ULL(7) #define XE_PPGTT_PTE_PAT1 BIT_ULL(4) #define XE_PPGTT_PTE_PAT0 BIT_ULL(3) diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index 10ed72228946b..665af2646243a 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -1242,6 +1242,9 @@ static u64 pte_encode_cache(struct xe_device *xe, enum xe_cache_level cache) if (pat_index & BIT(3)) pte |= XELPG_PPGTT_PTE_PAT3; + if (pat_index & (BIT(4))) + pte |= XE2_PPGTT_PTE_PAT4; + return pte; }