From: Peter Bergner Date: Wed, 14 Jan 2026 21:12:21 +0000 (-0600) Subject: RISC-V: Enable the ZD constraint only when xmipscbop is enabled [PR123092] X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=58977d739238d927c02f64c6417c887df86a5f55;p=thirdparty%2Fgcc.git RISC-V: Enable the ZD constraint only when xmipscbop is enabled [PR123092] The ZD constraint is specific to the mips prefetch instruction. It is currently always enabled, leading to ICEs when xmipscbop is disabled. Solved by only enabling the ZD constraint whenever xmipscbop is enabled. 2026-01-14 Peter Bergner gcc/ PR target/123092 * config/riscv/constraints.md (ZD): Disable when xmipscbop is disabled. Signed-off-by: Peter Bergner --- diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md index 85b4fdce5ee..673b05954e1 100644 --- a/gcc/config/riscv/constraints.md +++ b/gcc/config/riscv/constraints.md @@ -333,7 +333,7 @@ (define_address_constraint "ZD" "An address operand that is valid for a mips prefetch instruction" - (match_test "riscv_prefetch_offset_address_p (op, mode)")) + (match_test "TARGET_XMIPSCBOP && riscv_prefetch_offset_address_p (op, mode)")) (define_constraint "Ou07" "A 7-bit unsigned immediate."