From: Edgar E. Iglesias Date: Fri, 13 Apr 2018 19:55:21 +0000 (+0200) Subject: target-microblaze: Correct special register array sizes X-Git-Tag: v3.0.0-rc0~127^2~33 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5c594ef3c77c7226e7b2080430b9b74d26d5bd7e;p=thirdparty%2Fqemu.git target-microblaze: Correct special register array sizes Correct special register array sizes. Reviewed-by: Richard Henderson Signed-off-by: Edgar E. Iglesias --- diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 5be71bc3207..994496515f7 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -242,8 +242,8 @@ struct CPUMBState { uint32_t bimm; uint32_t imm; - uint32_t regs[33]; - uint32_t sregs[24]; + uint32_t regs[32]; + uint32_t sregs[14]; float_status fp_status; /* Stack protectors. Yes, it's a hw feature. */ uint32_t slr, shr; diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 46595e63360..9614f15d58b 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -54,7 +54,7 @@ static TCGv env_debug; static TCGv cpu_R[32]; -static TCGv cpu_SR[18]; +static TCGv cpu_SR[14]; static TCGv env_imm; static TCGv env_btaken; static TCGv env_btarget; @@ -106,8 +106,7 @@ static const char *regnames[] = static const char *special_regnames[] = { "rpc", "rmsr", "sr2", "sr3", "sr4", "sr5", "sr6", "sr7", - "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", - "sr16", "sr17", "sr18" + "sr8", "sr9", "sr10", "sr11", "sr12", "sr13" }; static inline void t_sync_flags(DisasContext *dc)