From: Paul Floyd <pjfloyd@wanadoo.fr>
Date: Sun, 12 May 2024 06:47:58 +0000 (+0200)
Subject: aarch64 regtest: add test for dc cva? op codes
X-Git-Tag: VALGRIND_3_24_0~143
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5cda2e248f7530c30651beaf6b5efb297f9395ea;p=thirdparty%2Fvalgrind.git

aarch64 regtest: add test for dc cva? op codes

And also system registers for feature tests.
---

diff --git a/.gitignore b/.gitignore
index a8b7ce4c7..9d90d1c65 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1807,6 +1807,7 @@
 /none/tests/arm64/bug484426
 /none/tests/arm64/crc32
 /none/tests/arm64/cvtf_imm
+/none/tests/arm64/dc_cvax
 /none/tests/arm64/fmadd_sub
 /none/tests/arm64/fp_and_simd
 /none/tests/arm64/fp_and_simd_v82
diff --git a/none/tests/arm64/Makefile.am b/none/tests/arm64/Makefile.am
index 4f2ee84f3..5cf3c4e19 100644
--- a/none/tests/arm64/Makefile.am
+++ b/none/tests/arm64/Makefile.am
@@ -7,6 +7,7 @@ EXTRA_DIST = \
 	bug484426.stdout.exp bug484426.stderr.exp bug484426.vgtest \
         crc32.stdout.exp crc32.stderr.exp crc32.vgtest \
         cvtf_imm.stdout.exp cvtf_imm.stderr.exp cvtf_imm.vgtest \
+        dc_cvax.vgtest dc_cvax.stderr.exp \
 	fp_and_simd.stdout.exp fp_and_simd.stderr.exp fp_and_simd.vgtest \
 	frinta_frintn.stderr.exp frinta_frintn.vgtest \
 	integer.stdout.exp integer.stderr.exp integer.vgtest \
@@ -27,6 +28,7 @@ check_PROGRAMS = \
 	allexec \
 	bug484426 \
         cvtf_imm \
+        dc_cvax \
 	fp_and_simd \
 	integer \
 	memory_test \
diff --git a/none/tests/arm64/dc_cvax.c b/none/tests/arm64/dc_cvax.c
new file mode 100644
index 000000000..79674ce59
--- /dev/null
+++ b/none/tests/arm64/dc_cvax.c
@@ -0,0 +1,30 @@
+#include <assert.h>
+#include <string.h>
+
+int main()
+{
+    char buf[64] __attribute__((aligned(64)));
+    unsigned long check_dc_zva;
+    unsigned long check_dc_cvap;
+    memset(buf, 0xAA, 64);
+    asm volatile("mrs %0, dczid_el0" : "=r" (check_dc_zva));
+    asm volatile("dc cvac, %0" :: "r" (buf));
+    asm volatile("dc cvau, %0" :: "r" (buf));
+    asm volatile("mrs %0, id_aa64isar1_el1" : "=r" (check_dc_cvap));
+    /* Not sure if GCC supports this syntax */
+    /*
+    if (check_dc_cvap & 0x3) {
+       asm volatile(".arch_extension ccpp;dc cvap, %0" :: "r" (buf));
+    }
+    if (check_dc_cvap & 0x2) {
+      asm volatile(".arch_extension ccdp;dc cvadp, %0" :: "r" (buf));
+    }
+    */
+    asm volatile("dc civac, %0" :: "r" (buf));
+    // and while I'm at it
+    if (!(check_dc_zva & 0x10)) {
+       asm volatile("dc zva, %0" :: "r" (buf));
+       assert(buf[0] == 0);
+       assert(buf[63] == 0);
+   }
+}
diff --git a/none/tests/arm64/dc_cvax.stderr.exp b/none/tests/arm64/dc_cvax.stderr.exp
new file mode 100644
index 000000000..e69de29bb
diff --git a/none/tests/arm64/dc_cvax.vgtest b/none/tests/arm64/dc_cvax.vgtest
new file mode 100644
index 000000000..f2b7a1e1b
--- /dev/null
+++ b/none/tests/arm64/dc_cvax.vgtest
@@ -0,0 +1,2 @@
+prog: dc_cvax
+vgopts: -q