From: Michael Neuling Date: Wed, 27 Nov 2024 04:18:40 +0000 (+0000) Subject: RISC-V: KVM: Fix csr_write -> csr_set for HVIEN PMU overflow bit X-Git-Tag: v6.12.7~156 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5d4380ec054e7bc8579c48db22ce659a818601e9;p=thirdparty%2Fkernel%2Fstable.git RISC-V: KVM: Fix csr_write -> csr_set for HVIEN PMU overflow bit [ Upstream commit ea6398a5af81e3e7fb3da5d261694d479a321fd9 ] This doesn't cause a problem currently as HVIEN isn't used elsewhere yet. Found by inspection. Signed-off-by: Michael Neuling Fixes: 16b0bde9a37c ("RISC-V: KVM: Add perf sampling support for guests") Reviewed-by: Atish Patra Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20241127041840.419940-1-michaelneuling@tenstorrent.com Signed-off-by: Anup Patel Signed-off-by: Sasha Levin --- diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index 2967d305c4427..9f3b527596ded 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -552,7 +552,7 @@ void kvm_riscv_aia_enable(void) csr_set(CSR_HIE, BIT(IRQ_S_GEXT)); /* Enable IRQ filtering for overflow interrupt only if sscofpmf is present */ if (__riscv_isa_extension_available(NULL, RISCV_ISA_EXT_SSCOFPMF)) - csr_write(CSR_HVIEN, BIT(IRQ_PMU_OVF)); + csr_set(CSR_HVIEN, BIT(IRQ_PMU_OVF)); } void kvm_riscv_aia_disable(void)