From: Jakub Jelinek <jakub@redhat.com>
Date: Wed, 22 Jan 2020 16:49:38 +0000 (+0100)
Subject: re PR inline-asm/93202 ([RISCV] ICE when using inline asm 'h' operand modifier)
X-Git-Tag: releases/gcc-9.3.0~201
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5e94f77146e63f0b26ce2cc1cf8f42ac493d777a;p=thirdparty%2Fgcc.git

re PR inline-asm/93202 ([RISCV] ICE when using inline asm 'h' operand modifier)

	PR inline-asm/93202
	* config/riscv/riscv.c (riscv_print_operand_reloc): Use
	output_operand_lossage instead of gcc_unreachable.
	* doc/md.texi (riscv f constraint): Fix typo.

	* gcc.target/riscv/pr93202.c: New test.
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3a024ce8f6e7..41478485b52a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2020-01-22  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from mainline
+	2020-01-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR inline-asm/93202
+	* config/riscv/riscv.c (riscv_print_operand_reloc): Use
+	output_operand_lossage instead of gcc_unreachable.
+	* doc/md.texi (riscv f constraint): Fix typo.
+
 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
 
 	Backported from mainline
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 5cb295d3abba..92e7f3125837 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -3089,7 +3089,8 @@ riscv_print_operand_reloc (FILE *file, rtx op, bool hi_reloc)
 	break;
 
       default:
-	gcc_unreachable ();
+	output_operand_lossage ("invalid use of '%%%c'", hi_reloc ? 'h' : 'R');
+	return;
     }
 
   fprintf (file, "%s(", reloc);
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 30612a6aecb3..50e13124bc30 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -3566,7 +3566,7 @@ The @code{X} register.
 @table @code
 
 @item f
-A floating-point register (if availiable).
+A floating-point register (if available).
 
 @item I
 An I-type 12-bit signed immediate.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 61eadf79eba8..0c26e2011515 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2020-01-22  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from mainline
+	2020-01-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR inline-asm/93202
+	* gcc.target/riscv/pr93202.c: New test.
+
 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
 
 	Backported from mainline
diff --git a/gcc/testsuite/gcc.target/riscv/pr93202.c b/gcc/testsuite/gcc.target/riscv/pr93202.c
new file mode 100644
index 000000000000..d8091b93179e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr93202.c
@@ -0,0 +1,10 @@
+/* PR inline-asm/93202 */
+/* { dg-do compile { target fpic } } */
+/* { dg-options "-fpic" } */
+
+void
+foo (void)
+{
+  asm volatile ("%h0" :: "i" (&foo));	/* { dg-error "invalid use of '%h'" } */
+  asm volatile ("%R0" :: "i" (&foo));	/* { dg-error "invalid use of '%R'" } */
+}