From: Florian Krohm Date: Sun, 29 Nov 2015 15:20:43 +0000 (+0000) Subject: Handle shift amounts 0..31. It is unclear why the shift amounts X-Git-Tag: svn/VALGRIND_3_12_0^2~60 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5f1d1412b9fe4101660d06f51344766cfc8264f1;p=thirdparty%2Fvalgrind.git Handle shift amounts 0..31. It is unclear why the shift amounts were initially restricted to 0..3. git-svn-id: svn://svn.valgrind.org/vex/trunk@3206 --- diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c index e0c0458d48..5260c99087 100644 --- a/VEX/priv/guest_arm_toIR.c +++ b/VEX/priv/guest_arm_toIR.c @@ -19665,10 +19665,10 @@ DisResult disInstr_THUMB_WRK ( UInt how = INSN1(5,4); Bool valid = !isBadRegT(rD) && !isBadRegT(rN) && !isBadRegT(rM); - /* but allow "add.w reg, sp, reg, lsl #N for N=0,1,2 or 3 + /* but allow "add.w reg, sp, reg, lsl #N for N=0..31 (T3) "ADD (SP plus register) */ if (!valid && INSN0(8,5) == BITS4(1,0,0,0) // add - && rD != 15 && rN == 13 && imm5 <= 3 && how == 0) { + && rD != 15 && rN == 13 && imm5 <= 31 && how == 0) { valid = True; } /* also allow "sub.w reg, sp, reg w/ no shift