From: Juzhe-Zhong Date: Wed, 23 Aug 2023 02:21:22 +0000 (+0800) Subject: RISC-V: Fix gather_load_run-12.c test X-Git-Tag: basepoints/gcc-15~6741 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5f3c8075f230309c4417b0e5256283d010ac99d2;p=thirdparty%2Fgcc.git RISC-V: Fix gather_load_run-12.c test FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c: Add vsetvli asm. --- diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c index b4e2ead8ca9b..2fb525d8ffca 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-12.c @@ -7,6 +7,12 @@ int main (void) { + /* FIXME: The purpose of this assembly is to ensure that the vtype register is + initialized befor instructions such as vmv1r.v are executed. Otherwise you + will get illegal instruction errors when running with spike+pk. This is an + interim solution for reduce unnecessary failures and a unified solution + will come later. */ + asm volatile("vsetivli x0, 0, e8, m1, ta, ma"); #define RUN_LOOP(DATA_TYPE, INDEX_TYPE) \ DATA_TYPE dest_##DATA_TYPE##_##INDEX_TYPE[202] = {0}; \ DATA_TYPE src_##DATA_TYPE##_##INDEX_TYPE[202] = {0}; \