From: Xionghu Luo Date: Thu, 28 Oct 2021 02:22:39 +0000 (-0500) Subject: rs6000: Fold xxsel to vsel since they have same semantics X-Git-Tag: basepoints/gcc-13~3555 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=5f9ef1339e9d0d709af6a70b60e584bf7decd761;p=thirdparty%2Fgcc.git rs6000: Fold xxsel to vsel since they have same semantics Fold xxsel to vsel like xxperm/vperm to avoid duplicate code. gcc/ChangeLog: 2021-10-28 Xionghu Luo PR target/94613 * config/rs6000/altivec.md: Add vsx register constraints. * config/rs6000/vsx.md (vsx_xxsel): Delete. (vsx_xxsel2): Likewise. (vsx_xxsel3): Likewise. (vsx_xxsel4): Likewise. gcc/testsuite/ChangeLog: 2021-10-28 Xionghu Luo * gcc.target/powerpc/builtins-1.c: Adjust. --- diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 158b3a708a31..a057218aa288 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -682,56 +682,68 @@ [(set_attr "type" "veccmp")]) (define_insn "altivec_vsel" - [(set (match_operand:VM 0 "altivec_register_operand" "=v") + [(set (match_operand:VM 0 "register_operand" "=wa,v") (ior:VM (and:VM - (not:VM (match_operand:VM 3 "altivec_register_operand" "v")) - (match_operand:VM 1 "altivec_register_operand" "v")) + (not:VM (match_operand:VM 3 "register_operand" "wa,v")) + (match_operand:VM 1 "register_operand" "wa,v")) (and:VM (match_dup 3) - (match_operand:VM 2 "altivec_register_operand" "v"))))] + (match_operand:VM 2 "register_operand" "wa,v"))))] "VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)" - "vsel %0,%1,%2,%3" - [(set_attr "type" "vecmove")]) + "@ + xxsel %x0,%x1,%x2,%x3 + vsel %0,%1,%2,%3" + [(set_attr "type" "vecmove") + (set_attr "isa" "")]) (define_insn "altivec_vsel2" - [(set (match_operand:VM 0 "altivec_register_operand" "=v") + [(set (match_operand:VM 0 "register_operand" "=wa,v") (ior:VM (and:VM - (not:VM (match_operand:VM 3 "altivec_register_operand" "v")) - (match_operand:VM 1 "altivec_register_operand" "v")) + (not:VM (match_operand:VM 3 "register_operand" "wa,v")) + (match_operand:VM 1 "register_operand" "wa,v")) (and:VM - (match_operand:VM 2 "altivec_register_operand" "v") + (match_operand:VM 2 "register_operand" "wa,v") (match_dup 3))))] "VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)" - "vsel %0,%1,%2,%3" - [(set_attr "type" "vecmove")]) + "@ + xxsel %x0,%x1,%x2,%x3 + vsel %0,%1,%2,%3" + [(set_attr "type" "vecmove") + (set_attr "isa" "")]) (define_insn "altivec_vsel3" - [(set (match_operand:VM 0 "altivec_register_operand" "=v") + [(set (match_operand:VM 0 "register_operand" "=wa,v") (ior:VM (and:VM - (match_operand:VM 3 "altivec_register_operand" "v") - (match_operand:VM 1 "altivec_register_operand" "v")) + (match_operand:VM 3 "register_operand" "wa,v") + (match_operand:VM 1 "register_operand" "wa,v")) (and:VM (not:VM (match_dup 3)) - (match_operand:VM 2 "altivec_register_operand" "v"))))] + (match_operand:VM 2 "register_operand" "wa,v"))))] "VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)" - "vsel %0,%2,%1,%3" - [(set_attr "type" "vecmove")]) + "@ + xxsel %x0,%x2,%x1,%x3 + vsel %0,%2,%1,%3" + [(set_attr "type" "vecmove") + (set_attr "isa" "")]) (define_insn "altivec_vsel4" - [(set (match_operand:VM 0 "altivec_register_operand" "=v") + [(set (match_operand:VM 0 "register_operand" "=wa,v") (ior:VM (and:VM - (match_operand:VM 1 "altivec_register_operand" "v") - (match_operand:VM 3 "altivec_register_operand" "v")) + (match_operand:VM 1 "register_operand" "wa,v") + (match_operand:VM 3 "register_operand" "wa,v")) (and:VM (not:VM (match_dup 3)) - (match_operand:VM 2 "altivec_register_operand" "v"))))] + (match_operand:VM 2 "register_operand" "wa,v"))))] "VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)" - "vsel %0,%2,%1,%3" - [(set_attr "type" "vecmove")]) + "@ + xxsel %x0,%x2,%x1,%x3 + vsel %0,%2,%1,%3" + [(set_attr "type" "vecmove") + (set_attr "isa" "")]) ;; Fused multiply add. diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 73fd2ce8abb2..0bf04feb6c4a 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -2184,63 +2184,6 @@ "xvcmpgep. %x0,%x1,%x2" [(set_attr "type" "")]) -;; Vector select -(define_insn "vsx_xxsel" - [(set (match_operand:VSX_L 0 "vsx_register_operand" "=,?wa") - (ior:VSX_L - (and:VSX_L - (not:VSX_L (match_operand:VSX_L 3 "vsx_register_operand" ",wa")) - (match_operand:VSX_L 1 "vsx_register_operand" ",wa")) - (and:VSX_L - (match_dup 3) - (match_operand:VSX_L 2 "vsx_register_operand" ",wa"))))] - "VECTOR_MEM_VSX_P (mode)" - "xxsel %x0,%x1,%x2,%x3" - [(set_attr "type" "vecmove") - (set_attr "isa" "")]) - -(define_insn "vsx_xxsel2" - [(set (match_operand:VSX_L 0 "vsx_register_operand" "=,?wa") - (ior:VSX_L - (and:VSX_L - (not:VSX_L (match_operand:VSX_L 3 "vsx_register_operand" ",wa")) - (match_operand:VSX_L 1 "vsx_register_operand" ",wa")) - (and:VSX_L - (match_operand:VSX_L 2 "vsx_register_operand" ",wa") - (match_dup 3))))] - "VECTOR_MEM_VSX_P (mode)" - "xxsel %x0,%x1,%x2,%x3" - [(set_attr "type" "vecmove") - (set_attr "isa" "")]) - -(define_insn "vsx_xxsel3" - [(set (match_operand:VSX_L 0 "vsx_register_operand" "=,?wa") - (ior:VSX_L - (and:VSX_L - (match_operand:VSX_L 3 "vsx_register_operand" ",wa") - (match_operand:VSX_L 1 "vsx_register_operand" ",wa")) - (and:VSX_L - (not:VSX_L (match_dup 3)) - (match_operand:VSX_L 2 "vsx_register_operand" ",wa"))))] - "VECTOR_MEM_VSX_P (mode)" - "xxsel %x0,%x2,%x1,%x3" - [(set_attr "type" "vecmove") - (set_attr "isa" "")]) - -(define_insn "vsx_xxsel4" - [(set (match_operand:VSX_L 0 "vsx_register_operand" "=,?wa") - (ior:VSX_L - (and:VSX_L - (match_operand:VSX_L 1 "vsx_register_operand" ",wa") - (match_operand:VSX_L 3 "vsx_register_operand" ",wa")) - (and:VSX_L - (not:VSX_L (match_dup 3)) - (match_operand:VSX_L 2 "vsx_register_operand" ",wa"))))] - "VECTOR_MEM_VSX_P (mode)" - "xxsel %x0,%x2,%x1,%x3" - [(set_attr "type" "vecmove") - (set_attr "isa" "")]) - ;; Copy sign (define_insn "vsx_copysign3" [(set (match_operand:VSX_F 0 "vsx_register_operand" "=wa") diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1.c b/gcc/testsuite/gcc.target/powerpc/builtins-1.c index 2dafa9029534..63fbd2e3be12 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-1.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.c @@ -326,7 +326,7 @@ int main () /* { dg-final { scan-assembler-times {\mvpkudus\M} 1 } } */ /* { dg-final { scan-assembler-times "vperm" 4 } } */ /* { dg-final { scan-assembler-times "xvrdpi" 2 } } */ -/* { dg-final { scan-assembler-times "xxsel" 10 } } */ +/* { dg-final { scan-assembler-times "xxsel" 5 } } */ /* { dg-final { scan-assembler-times "xxlxor" 6 } } */ /* { dg-final { scan-assembler-times "divd" 8 { target lp64 } } } */ /* { dg-final { scan-assembler-times "divdu" 2 { target lp64 } } } */