From: Lin Sinan <sinan.lin@linux.alibaba.com>
Date: Sun, 5 Mar 2023 08:09:50 +0000 (+0800)
Subject: RISC-V: Allow const0_rtx operand in max/min
X-Git-Tag: basepoints/gcc-14~724
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=602cfc746e9e0447221896a3d93608c6db3a89e5;p=thirdparty%2Fgcc.git

RISC-V: Allow const0_rtx operand in max/min

Optimize cases that use max[u]/min[u] against a zero constant.

E.g., the case int f(int x) { return x >= 0 ? x : 0; }
the current asm output in rv64gc_zba_zbb

 li rtmp,0
 max a0,a0,rtmp

could be optimized into

 max a0,a0,zero

gcc/ChangeLog:
	* config/riscv/bitmanip.md: allow 0 constant in max/min
	pattern.

gcc/testsuite/ChangeLog:
	* gcc.target/riscv/zbb-min-max-03.c: New test.
---

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 58a86bd929f1..cfdb9eb4689b 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -363,9 +363,9 @@
 (define_insn "<bitmanip_optab><mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
         (bitmanip_minmax:X (match_operand:X 1 "register_operand" "r")
-			   (match_operand:X 2 "register_operand" "r")))]
+			   (match_operand:X 2 "reg_or_0_operand" "rJ")))]
   "TARGET_ZBB"
-  "<bitmanip_insn>\t%0,%1,%2"
+  "<bitmanip_insn>\t%0,%1,%z2"
   [(set_attr "type" "bitmanip")])
 
 ;; Optimize the common case of a SImode min/max against a constant
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c
new file mode 100644
index 000000000000..c7de10040489
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zba_zbb -mabi=lp64d" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" } } */
+
+int f(int x) {
+ return x >= 0 ? x : 0;
+}
+
+/* { dg-final { scan-assembler-times "max\t" 1 } } */
+/* { dg-final { scan-assembler-not "li\t" } } */