From: Abin Joseph Date: Wed, 9 Oct 2024 16:28:21 +0000 (+0530) Subject: dt-bindings: net: emaclite: Add clock support X-Git-Tag: v6.13-rc1~135^2~348^2~2 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=60dbdc6e08d6fe66380598ef8bb857a4474e30d9;p=thirdparty%2Flinux.git dt-bindings: net: emaclite: Add clock support Add s_axi_aclk AXI4 clock support. Traditionally this IP was used on microblaze platforms which had fixed clocks enabled all the time. But since its a PL IP, it can also be used on SoC platforms like Zynq UltraScale+ MPSoC which combines processing system (PS) and user programmable logic (PL) into the same device. On these platforms instead of fixed enabled clocks it is mandatory to explicitly enable IP clocks for proper functionality. So make clock a required property and also define max supported clock constraints. Signed-off-by: Abin Joseph Signed-off-by: Radhey Shyam Pandey Acked-by: Conor Dooley Link: https://patch.msgid.link/1728491303-1456171-2-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Jakub Kicinski --- diff --git a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml index 92d8ade988f69..e16384aff5577 100644 --- a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml +++ b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml @@ -29,6 +29,9 @@ properties: interrupts: maxItems: 1 + clocks: + maxItems: 1 + phy-handle: true local-mac-address: true @@ -45,6 +48,7 @@ required: - compatible - reg - interrupts + - clocks - phy-handle additionalProperties: false @@ -56,6 +60,7 @@ examples: reg = <0x40e00000 0x10000>; interrupt-parent = <&axi_intc_1>; interrupts = <1>; + clocks = <&dummy>; local-mac-address = [00 00 00 00 00 00]; phy-handle = <&phy0>; xlnx,rx-ping-pong;