From: Chris Park Date: Wed, 1 May 2024 03:06:12 +0000 (-0400) Subject: drm/amd/display: Reduce I2C speed to 95kHz in DCN401 X-Git-Tag: v6.11-rc1~141^2~25^2~252 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=61f880039eea17a181fb3286881704c2c4287335;p=thirdparty%2Fkernel%2Fstable.git drm/amd/display: Reduce I2C speed to 95kHz in DCN401 [WHY] HW for DCN401 is presented with a small I2C speed fluctuation that exceeds the hard cap limitation of 100kHz occasionally. This violates compliance requirement and will result in failure in compliance. [HOW] After various measurements and traceback to previous generation HW, DCN IP, SI and SW driver agrees that we can reduce I2C speed to 95kHz to address the I2C spped fluctuation in DCN401. Reviewed-by: Dillon Varone Acked-by: Alex Hung Signed-off-by: Chris Park Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c index 75e2c62ae7922..a55421363772d 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c @@ -1772,8 +1772,8 @@ static bool dcn401_resource_construct( pool->base.pipe_count = num_pipes; pool->base.mpcc_count = num_pipes; dc->caps.max_downscale_ratio = 600; - dc->caps.i2c_speed_in_khz = 100; - dc->caps.i2c_speed_in_khz_hdcp = 100; /*1.4 w/a applied by default*/ + dc->caps.i2c_speed_in_khz = 95; + dc->caps.i2c_speed_in_khz_hdcp = 95; /*1.4 w/a applied by default*/ /* TODO: Bring max cursor size back to 256 after subvp cursor corruption is fixed*/ dc->caps.max_cursor_size = 64; dc->caps.cursor_not_scaled = true;