From: Kyrylo Tkachov Date: Wed, 7 Nov 2018 17:56:51 +0000 (+0000) Subject: [arm] Add support for Arm Ares X-Git-Tag: basepoints/gcc-10~3251 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6279fcd66fa8dd5b6e8fc78845931bfe72593907;p=thirdparty%2Fgcc.git [arm] Add support for Arm Ares This adds support for the Arm Ares CPU for in the arm port. It implements the Armv8.2-A architecture with the optional features of statistical profiling, dot product and FP16 on by default. Note: Ares is a codename to enable early adopters and in time we will add the final product name once it's announced. * config/arm/arm-cpus.in (ares): New entry. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Likewise. * doc/invoke.texi (ARM Options): Document ares. From-SVN: r265881 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4cef61592e72..c43a093def10 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2018-11-07 Kyrylo Tkachov + + * config/arm/arm-cpus.in (ares): New entry. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Likewise. + * doc/invoke.texi (ARM Options): Document ares. + 2018-11-07 Kyrylo Tkachov * config/aarch64/aarch64-cores.def (ares): Define. diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index d82e95a22665..b3163a90260c 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -1376,6 +1376,17 @@ begin cpu cortex-a76 part d0b end cpu cortex-a76 +begin cpu ares + cname ares + tune for cortex-a57 + tune flags LDSCHED + architecture armv8.2-a+fp16+dotprod+simd + option crypto add FP_ARMv8 CRYPTO + costs cortex_a57 + vendor 41 + part d0c +end cpu ares + # ARMv8.2 A-profile ARM DynamIQ big.LITTLE implementations begin cpu cortex-a75.cortex-a55 cname cortexa75cortexa55 diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index eacee746a399..ceac4b4be419 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -282,6 +282,9 @@ Enum(processor_type) String(cortex-a75) Value( TARGET_CPU_cortexa75) EnumValue Enum(processor_type) String(cortex-a76) Value( TARGET_CPU_cortexa76) +EnumValue +Enum(processor_type) String(ares) Value( TARGET_CPU_ares) + EnumValue Enum(processor_type) String(cortex-a75.cortex-a55) Value( TARGET_CPU_cortexa75cortexa55) diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index f64c1ef176de..2bd7e8741166 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -49,7 +49,7 @@ cortexa72,cortexa73,exynosm1, xgene1,cortexa57cortexa53,cortexa72cortexa53, cortexa73cortexa35,cortexa73cortexa53,cortexa55, - cortexa75,cortexa76,cortexa75cortexa55, - cortexa76cortexa55,cortexm23,cortexm33, - cortexr52" + cortexa75,cortexa76,ares, + cortexa75cortexa55,cortexa76cortexa55,cortexm23, + cortexm33,cortexr52" (const (symbol_ref "((enum attr_tune) arm_tune)"))) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 48c9706eb889..d252b28b6f91 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -16708,8 +16708,8 @@ Permissible names are: @samp{arm2}, @samp{arm250}, @samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17}, @samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55}, @samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75}, -@samp{cortex-a76}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, -@samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52}, +@samp{cortex-a76}, @samp{ares}, @samp{cortex-r4}, @samp{cortex-r4f}, +@samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52}, @samp{cortex-m33}, @samp{cortex-m23}, @samp{cortex-m7},