From: Lad Prabhakar Date: Tue, 17 Jun 2025 15:57:55 +0000 (+0100) Subject: dt-bindings: clock: renesas,r9a09g077: Add PCLKL core clock ID X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=62ab7ac5be90392a9ac0955febab778ebf51bc0a;p=thirdparty%2Flinux.git dt-bindings: clock: renesas,r9a09g077: Add PCLKL core clock ID Add the Peripheral Module Clock L (PCLKL) core clock ID for the RZ/T2H (R9A09G077) SoC. This clock is used by peripherals such as IIC, WDT, and others. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250617155757.149597-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h index 1b22fe88dec7a..f6e5f62b07c4a 100644 --- a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h +++ b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h @@ -23,5 +23,6 @@ #define R9A09G077_CLK_PCLKGPTL 11 #define R9A09G077_CLK_PCLKH 12 #define R9A09G077_CLK_PCLKM 13 +#define R9A09G077_CLK_PCLKL 14 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */