From: Kathiravan Thirumoorthy Date: Thu, 14 Sep 2023 06:59:55 +0000 (+0530) Subject: clk: qcom: ipq5332: drop the CLK_SET_RATE_PARENT flag from GPLL clocks X-Git-Tag: v6.5.12~366 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=63d552f9dae8da254ee07f40780d3c557560cd69;p=thirdparty%2Fkernel%2Fstable.git clk: qcom: ipq5332: drop the CLK_SET_RATE_PARENT flag from GPLL clocks [ Upstream commit 5635ef0bd1052420bc659a00be6fd0c60cec5cb9 ] GPLL clock rates are fixed and shouldn't be scaled based on the request from dependent clocks. Doing so will result in the unexpected behaviour. So drop the CLK_SET_RATE_PARENT flag from the GPLL clocks. Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC") Signed-off-by: Kathiravan Thirumoorthy Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20230913-gpll_cleanup-v2-5-c8ceb1a37680@quicinc.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c index 1077d03cefe5b..c975fb6719d45 100644 --- a/drivers/clk/qcom/gcc-ipq5332.c +++ b/drivers/clk/qcom/gcc-ipq5332.c @@ -111,7 +111,6 @@ static struct clk_alpha_pll_postdiv gpll2 = { &gpll2_main.clkr.hw }, .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, - .flags = CLK_SET_RATE_PARENT, }, }; @@ -151,7 +150,6 @@ static struct clk_alpha_pll_postdiv gpll4 = { &gpll4_main.clkr.hw }, .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, - .flags = CLK_SET_RATE_PARENT, }, };