From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Date: Mon, 24 Oct 2022 01:39:16 +0000 (+0800)
Subject: RISC-V: Fix REG_CLASS_CONTENTS.
X-Git-Tag: basepoints/gcc-14~3759
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=65908ac84b840ded3331e000d303d0a5b4b426c8;p=thirdparty%2Fgcc.git

RISC-V: Fix REG_CLASS_CONTENTS.

Include V_REGS for ALL_REGS.

gcc/ChangeLog:

	* config/riscv/riscv.h (REG_CLASS_CONTENTS): Fix ALL_REGS.
---

diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index acae68ebb2db..37363e975e11 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -516,7 +516,7 @@ enum reg_class
   { 0x00000000, 0x00000000, 0x00000000, 0x00000001 },	/* V0_REGS */		\
   { 0x00000000, 0x00000000, 0x00000000, 0xfffffffe },	/* VNoV0_REGS */	\
   { 0x00000000, 0x00000000, 0x00000000, 0xffffffff },	/* V_REGS */		\
-  { 0xffffffff, 0xffffffff, 0x00000003, 0x00000000 }	/* ALL_REGS */		\
+  { 0xffffffff, 0xffffffff, 0x0000000f, 0xffffffff }	/* ALL_REGS */		\
 }
 
 /* A C expression whose value is a register class containing hard