From: Martin Tůma Date: Wed, 25 Mar 2026 12:01:18 +0000 (+0100) Subject: media: mgb4: Fix DV timings limits X-Git-Tag: v7.2-rc1~101^2~364 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=65e0242c375284bd5b884106cd722591291d0e60;p=thirdparty%2Fkernel%2Flinux.git media: mgb4: Fix DV timings limits Provide the real DV timings limits in VIDIOC_DV_TIMINGS_CAP. For the outputs the pixelclock is limited by the CMT table <25000kHz, 2*94642kHz>, for the inputs a slightly broader range is possible. The minimal supported/tested resolution is 64px. Signed-off-by: Martin Tůma Signed-off-by: Hans Verkuil --- diff --git a/drivers/media/pci/mgb4/mgb4_vin.c b/drivers/media/pci/mgb4/mgb4_vin.c index 74fb00c4a4082..b247854556919 100644 --- a/drivers/media/pci/mgb4/mgb4_vin.c +++ b/drivers/media/pci/mgb4/mgb4_vin.c @@ -85,12 +85,12 @@ static const struct mgb4_i2c_kv gmsl1_i2c[] = { static const struct v4l2_dv_timings_cap video_timings_cap = { .type = V4L2_DV_BT_656_1120, .bt = { - .min_width = 240, + .min_width = 64, .max_width = 4096, - .min_height = 240, + .min_height = 64, .max_height = 4096, - .min_pixelclock = 1843200, /* 320 x 240 x 24Hz */ - .max_pixelclock = 530841600, /* 4096 x 2160 x 60Hz */ + .min_pixelclock = 20000000, + .max_pixelclock = 200000000, .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT | V4L2_DV_BT_STD_GTF, .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE | diff --git a/drivers/media/pci/mgb4/mgb4_vout.c b/drivers/media/pci/mgb4/mgb4_vout.c index 7725bcd55e4cb..22fbc9e538193 100644 --- a/drivers/media/pci/mgb4/mgb4_vout.c +++ b/drivers/media/pci/mgb4/mgb4_vout.c @@ -53,12 +53,12 @@ static const struct mgb4_i2c_kv gmsl1_i2c[] = { static const struct v4l2_dv_timings_cap video_timings_cap = { .type = V4L2_DV_BT_656_1120, .bt = { - .min_width = 240, + .min_width = 64, .max_width = 4096, - .min_height = 240, + .min_height = 64, .max_height = 4096, - .min_pixelclock = 1843200, /* 320 x 240 x 24Hz */ - .max_pixelclock = 530841600, /* 4096 x 2160 x 60Hz */ + .min_pixelclock = 25000000, + .max_pixelclock = 189284000, .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CVT | V4L2_DV_BT_STD_GTF, .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |