From: Uros Bizjak Date: Mon, 24 Jul 2017 20:29:02 +0000 (+0200) Subject: re PR target/80569 (i686: "shrx" instruction generated in 16-bit mode) X-Git-Tag: releases/gcc-5.5.0~145 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=65f69f384f61bb46bb8aca44fec5c3c293982f75;p=thirdparty%2Fgcc.git re PR target/80569 (i686: "shrx" instruction generated in 16-bit mode) PR target/80569 * config/i386/i386.c (ix86_option_override_internal): Disable BMI, BMI2 and TBM instructions for -m16. testsuite/ChangeLog: PR target/80569 * gcc.target/i386/pr80569.c: New test. From-SVN: r250486 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9d4c3b9c925c..2ace2023444d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-07-24 Uros Bizjak + + PR target/80569 + * config/i386/i386.c (ix86_option_override_internal): Disable + BMI, BMI2 and TBM instructions for -m16. + 2017-07-18 Uros Bizjak PR target/81471 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index b1ac232fa491..11ab50b69732 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -4015,6 +4015,12 @@ ix86_option_override_internal (bool main_args_p, opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit; + /* Disable BMI, BMI2 and TBM instructions for -m16. */ + if (TARGET_16BIT_P(opts->x_ix86_isa_flags)) + opts->x_ix86_isa_flags + &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM) + & ~opts->x_ix86_isa_flags_explicit); + /* Validate -mpreferred-stack-boundary= value or default it to PREFERRED_STACK_BOUNDARY_DEFAULT. */ ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 936b4537475e..ba0c3fe3ce46 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-07-24 Uros Bizjak + + PR target/80569 + * gcc.target/i386/pr80569.c: New test. + 2017-07-18 Uros Bizjak PR target/81471 diff --git a/gcc/testsuite/gcc.target/i386/pr80569.c b/gcc/testsuite/gcc.target/i386/pr80569.c new file mode 100644 index 000000000000..8e11c40bb08b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr80569.c @@ -0,0 +1,9 @@ +/* PR target/80569 */ +/* { dg-do assemble } */ +/* { dg-options "-O2 -m16 -march=haswell" } */ + +void load_kernel(void *setup_addr) +{ + unsigned int seg = (unsigned int)setup_addr >> 4; + asm("movl %0, %%es" : : "r"(seg)); +}