From: Richard Sandiford <richard.sandiford@arm.com>
Date: Mon, 20 Jan 2025 19:52:31 +0000 (+0000)
Subject: aarch64: Fix invalid subregs in xorsign [PR118501]
X-Git-Tag: basepoints/gcc-16~2480
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6612b8e55471fabd2071a9637a06d3ffce2b05a6;p=thirdparty%2Fgcc.git

aarch64: Fix invalid subregs in xorsign [PR118501]

In the testcase, we try to use xorsign on:

   (subreg:DF (reg:TI R) 8)

i.e. the highpart of the TI.  xorsign wants to take a V2DF
paradoxical subreg of this, which is rightly rejected as a direct
operation.  In cases like this, we need to force the highpart into
a fresh register first.

gcc/
	PR target/118501
	* config/aarch64/aarch64.md (@xorsign<mode>3): Use
	force_lowpart_subreg.

gcc/testsuite/
	PR target/118501
	* gcc.c-torture/compile/pr118501.c: New test.
---

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 1b67ccc31dd..f8d82cee903 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -7476,8 +7476,8 @@
   "TARGET_SIMD"
 {
   rtx tmp = gen_reg_rtx (<VCONQ>mode);
-  rtx op1 = lowpart_subreg (<VCONQ>mode, operands[1], <MODE>mode);
-  rtx op2 = lowpart_subreg (<VCONQ>mode, operands[2], <MODE>mode);
+  rtx op1 = force_lowpart_subreg (<VCONQ>mode, operands[1], <MODE>mode);
+  rtx op2 = force_lowpart_subreg (<VCONQ>mode, operands[2], <MODE>mode);
   emit_insn (gen_xorsign3 (<VCONQ>mode, tmp, op1, op2));
   emit_move_insn (operands[0],
 		  lowpart_subreg (<MODE>mode, tmp, <VCONQ>mode));
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr118501.c b/gcc/testsuite/gcc.c-torture/compile/pr118501.c
new file mode 100644
index 00000000000..064b76208ca
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr118501.c
@@ -0,0 +1,6 @@
+struct s1 {
+  double data[2];
+};
+double h(double t, struct s1 z_) {
+  return z_.data[1] * __builtin_copysign(1.0, t);
+}