From: Jonas Jelonek Date: Sat, 20 Dec 2025 21:42:34 +0000 (+0000) Subject: realtek: pcs: rtl931x: fix MII mode setting X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6614fcb95ef71c666cf3c169754f39c14a03921b;p=thirdparty%2Fopenwrt.git realtek: pcs: rtl931x: fix MII mode setting The function 'rtpcs_931x_sds_mii_mode_set' does not correctly write the register. It just write a plain value at the determined register address. While this works for SerDes with (id mod 4 == 0), it doesn't for the other SerDes. Fix that by using a corresponding shift and writing only some bits instead of the whole register. While at it, drop an unneeded blank line, add comment to explain a bit that is set and use the BIT(..) helper for that instead of manual shift. Signed-off-by: Jonas Jelonek Link: https://github.com/openwrt/openwrt/pull/20736 Signed-off-by: Robert Marko --- diff --git a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c index bf2110ef534..48b890114f9 100644 --- a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c @@ -2381,6 +2381,7 @@ static void rtpcs_931x_sds_mii_mode_set(struct rtpcs_serdes *sds, phy_interface_t mode) { u32 val; + int shift = ((sds->id & 0x3) << 3); switch (mode) { case PHY_INTERFACE_MODE_QSGMII: @@ -2400,10 +2401,10 @@ static void rtpcs_931x_sds_mii_mode_set(struct rtpcs_serdes *sds, return; } - val |= (1 << 7); - - regmap_write(sds->ctrl->map, - RTL931X_SERDES_MODE_CTRL + 4 * (sds->id >> 2), val); + val |= BIT(7); /* force mode bit */ + regmap_write_bits(sds->ctrl->map, + RTL931X_SERDES_MODE_CTRL + 4 * (sds->id >> 2), + 0xff << shift, val << shift); } static void rtpcs_931x_sds_disable(struct rtpcs_serdes *sds)