From: Rob Herring (Arm) Date: Sat, 7 Jun 2025 21:25:07 +0000 (-0500) Subject: dt-bindings: phy: Convert brcm,sr-pcie-phy to DT schema X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6725c334e94a16ac141f23a3aa59cab7eb52cb6b;p=thirdparty%2Fkernel%2Flinux.git dt-bindings: phy: Convert brcm,sr-pcie-phy to DT schema Convert the Broadcom Stingray PCIe PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250607212508.741193-1-robh@kernel.org Signed-off-by: Vinod Koul --- diff --git a/Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.txt b/Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.txt deleted file mode 100644 index e8d82286beb9d..0000000000000 --- a/Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.txt +++ /dev/null @@ -1,41 +0,0 @@ -Broadcom Stingray PCIe PHY - -Required properties: -- compatible: must be "brcm,sr-pcie-phy" -- reg: base address and length of the PCIe SS register space -- brcm,sr-cdru: phandle to the CDRU syscon node -- brcm,sr-mhb: phandle to the MHB syscon node -- #phy-cells: Must be 1, denotes the PHY index - -For PAXB based root complex, one can have a configuration of up to 8 PHYs -PHY index goes from 0 to 7 - -For the internal PAXC based root complex, PHY index is always 8 - -Example: - mhb: syscon@60401000 { - compatible = "brcm,sr-mhb", "syscon"; - reg = <0 0x60401000 0 0x38c>; - }; - - cdru: syscon@6641d000 { - compatible = "brcm,sr-cdru", "syscon"; - reg = <0 0x6641d000 0 0x400>; - }; - - pcie_phy: phy@40000000 { - compatible = "brcm,sr-pcie-phy"; - reg = <0 0x40000000 0 0x800>; - brcm,sr-cdru = <&cdru>; - brcm,sr-mhb = <&mhb>; - #phy-cells = <1>; - }; - - /* users of the PCIe PHY */ - - pcie0: pcie@48000000 { - ... - ... - phys = <&pcie_phy 0>; - phy-names = "pcie-phy"; - }; diff --git a/Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.yaml new file mode 100644 index 0000000000000..60ccc0813ed54 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/brcm,sr-pcie-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom Stingray PCIe PHY + +maintainers: + - Ray Jui + +description: > + For PAXB based root complex, one can have a configuration of up to 8 PHYs. + PHY index goes from 0 to 7. + + For the internal PAXC based root complex, PHY index is always 8. + +properties: + compatible: + const: brcm,sr-pcie-phy + + reg: + maxItems: 1 + + '#phy-cells': + const: 1 + + brcm,sr-cdru: + description: phandle to the CDRU syscon node + $ref: /schemas/types.yaml#/definitions/phandle + + brcm,sr-mhb: + description: phandle to the MHB syscon node + $ref: /schemas/types.yaml#/definitions/phandle + +additionalProperties: false + +examples: + - | + phy@40000000 { + compatible = "brcm,sr-pcie-phy"; + reg = <0x40000000 0x800>; + brcm,sr-cdru = <&cdru>; + brcm,sr-mhb = <&mhb>; + #phy-cells = <1>; + };