From: Florian Krohm Date: Sat, 10 Jan 2015 16:10:58 +0000 (+0000) Subject: The size of an event check never depends on the endianess X-Git-Tag: svn/VALGRIND_3_11_0^2~111 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6a3c7b6540840db9dfc45da241de8b95ed5a79df;p=thirdparty%2Fvalgrind.git The size of an event check never depends on the endianess of the host. Remove parameter. git-svn-id: svn://svn.valgrind.org/vex/trunk@3063 --- diff --git a/VEX/priv/host_amd64_defs.c b/VEX/priv/host_amd64_defs.c index 8124ab0f96..7118e2ba8e 100644 --- a/VEX/priv/host_amd64_defs.c +++ b/VEX/priv/host_amd64_defs.c @@ -3499,7 +3499,7 @@ Int emit_AMD64Instr ( /*MB_MOD*/Bool* is_profInc, p = doAMode_M(p, fake(4), i->Ain.EvCheck.amFailAddr); vassert(p - p0 == 8); /* also ensures that 0x03 offset above is ok */ /* And crosscheck .. */ - vassert(evCheckSzB_AMD64(endness_host) == 8); + vassert(evCheckSzB_AMD64() == 8); goto done; } @@ -3542,7 +3542,7 @@ Int emit_AMD64Instr ( /*MB_MOD*/Bool* is_profInc, /* How big is an event check? See case for Ain_EvCheck in emit_AMD64Instr just above. That crosschecks what this returns, so we can tell if we're inconsistent. */ -Int evCheckSzB_AMD64 ( VexEndness endness_host ) +Int evCheckSzB_AMD64 (void) { return 8; } diff --git a/VEX/priv/host_amd64_defs.h b/VEX/priv/host_amd64_defs.h index 73caf5cf3c..09abfe0f7f 100644 --- a/VEX/priv/host_amd64_defs.h +++ b/VEX/priv/host_amd64_defs.h @@ -784,7 +784,7 @@ extern HInstrArray* iselSB_AMD64 ( const IRSB*, and so assumes that they are both <= 128, and so can use the short offset encoding. This is all checked with assertions, so in the worst case we will merely assert at startup. */ -extern Int evCheckSzB_AMD64 ( VexEndness endness_host ); +extern Int evCheckSzB_AMD64 (void); /* Perform a chaining and unchaining of an XDirect jump. */ extern VexInvalRange chainXDirect_AMD64 ( VexEndness endness_host, diff --git a/VEX/priv/host_arm64_defs.c b/VEX/priv/host_arm64_defs.c index 38ad6fa934..8b5114e073 100644 --- a/VEX/priv/host_arm64_defs.c +++ b/VEX/priv/host_arm64_defs.c @@ -5158,7 +5158,7 @@ Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc, /* nofail: */ /* Crosscheck */ - vassert(evCheckSzB_ARM64(endness_host) == (UChar*)p - (UChar*)p0); + vassert(evCheckSzB_ARM64() == (UChar*)p - (UChar*)p0); goto done; } @@ -5202,7 +5202,7 @@ Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc, /* How big is an event check? See case for ARM64in_EvCheck in emit_ARM64Instr just above. That crosschecks what this returns, so we can tell if we're inconsistent. */ -Int evCheckSzB_ARM64 ( VexEndness endness_host ) +Int evCheckSzB_ARM64 (void) { return 24; } diff --git a/VEX/priv/host_arm64_defs.h b/VEX/priv/host_arm64_defs.h index 2d4ca3ce00..b25cf20a2b 100644 --- a/VEX/priv/host_arm64_defs.h +++ b/VEX/priv/host_arm64_defs.h @@ -962,7 +962,7 @@ extern HInstrArray* iselSB_ARM64 ( const IRSB*, /* How big is an event check? This is kind of a kludge because it depends on the offsets of host_EvC_FAILADDR and host_EvC_COUNTER. */ -extern Int evCheckSzB_ARM64 ( VexEndness endness_host ); +extern Int evCheckSzB_ARM64 (void); /* Perform a chaining and unchaining of an XDirect jump. */ extern VexInvalRange chainXDirect_ARM64 ( VexEndness endness_host, diff --git a/VEX/priv/host_arm_defs.c b/VEX/priv/host_arm_defs.c index b4540055fe..9fa93c8c0b 100644 --- a/VEX/priv/host_arm_defs.c +++ b/VEX/priv/host_arm_defs.c @@ -4644,7 +4644,7 @@ Int emit_ARMInstr ( /*MB_MOD*/Bool* is_profInc, /* nofail: */ /* Crosscheck */ - vassert(evCheckSzB_ARM(endness_host) == (UChar*)p - (UChar*)p0); + vassert(evCheckSzB_ARM() == (UChar*)p - (UChar*)p0); goto done; } @@ -4695,7 +4695,7 @@ Int emit_ARMInstr ( /*MB_MOD*/Bool* is_profInc, /* How big is an event check? See case for ARMin_EvCheck in emit_ARMInstr just above. That crosschecks what this returns, so we can tell if we're inconsistent. */ -Int evCheckSzB_ARM ( VexEndness endness_host ) +Int evCheckSzB_ARM (void) { return 24; } diff --git a/VEX/priv/host_arm_defs.h b/VEX/priv/host_arm_defs.h index b36c487bf2..6bc24d4d04 100644 --- a/VEX/priv/host_arm_defs.h +++ b/VEX/priv/host_arm_defs.h @@ -1052,7 +1052,7 @@ extern HInstrArray* iselSB_ARM ( const IRSB*, /* How big is an event check? This is kind of a kludge because it depends on the offsets of host_EvC_FAILADDR and host_EvC_COUNTER. */ -extern Int evCheckSzB_ARM ( VexEndness endness_host ); +extern Int evCheckSzB_ARM (void); /* Perform a chaining and unchaining of an XDirect jump. */ extern VexInvalRange chainXDirect_ARM ( VexEndness endness_host, diff --git a/VEX/priv/host_mips_defs.c b/VEX/priv/host_mips_defs.c index 24855bea58..398778f2ed 100644 --- a/VEX/priv/host_mips_defs.c +++ b/VEX/priv/host_mips_defs.c @@ -4230,7 +4230,7 @@ Int emit_MIPSInstr ( /*MB_MOD*/Bool* is_profInc, /* nofail: */ /* Crosscheck */ - vassert(evCheckSzB_MIPS(endness_host) == (UChar*)p - (UChar*)p0); + vassert(evCheckSzB_MIPS() == (UChar*)p - (UChar*)p0); goto done; } @@ -4316,7 +4316,7 @@ Int emit_MIPSInstr ( /*MB_MOD*/Bool* is_profInc, /* How big is an event check? See case for Min_EvCheck in emit_MIPSInstr just above. That crosschecks what this returns, so we can tell if we're inconsistent. */ -Int evCheckSzB_MIPS ( VexEndness endness_host ) +Int evCheckSzB_MIPS (void) { UInt kInstrSize = 4; return 7*kInstrSize; diff --git a/VEX/priv/host_mips_defs.h b/VEX/priv/host_mips_defs.h index 1e0abc8c3a..787088b256 100644 --- a/VEX/priv/host_mips_defs.h +++ b/VEX/priv/host_mips_defs.h @@ -742,7 +742,7 @@ extern HInstrArray *iselSB_MIPS ( const IRSB*, and so assumes that they are both <= 128, and so can use the short offset encoding. This is all checked with assertions, so in the worst case we will merely assert at startup. */ -extern Int evCheckSzB_MIPS ( VexEndness endness_host ); +extern Int evCheckSzB_MIPS (void); /* Perform a chaining and unchaining of an XDirect jump. */ extern VexInvalRange chainXDirect_MIPS ( VexEndness endness_host, diff --git a/VEX/priv/host_ppc_defs.c b/VEX/priv/host_ppc_defs.c index 4b2167568e..782cbbfbb7 100644 --- a/VEX/priv/host_ppc_defs.c +++ b/VEX/priv/host_ppc_defs.c @@ -5838,7 +5838,7 @@ Int emit_PPCInstr ( /*MB_MOD*/Bool* is_profInc, /* nofail: */ /* Crosscheck */ - vassert(evCheckSzB_PPC(endness_host) == (UChar*)p - (UChar*)p0); + vassert(evCheckSzB_PPC() == (UChar*)p - (UChar*)p0); goto done; } @@ -5903,7 +5903,7 @@ Int emit_PPCInstr ( /*MB_MOD*/Bool* is_profInc, /* How big is an event check? See case for Pin_EvCheck in emit_PPCInstr just above. That crosschecks what this returns, so we can tell if we're inconsistent. */ -Int evCheckSzB_PPC ( VexEndness endness_host ) +Int evCheckSzB_PPC (void) { return 28; } diff --git a/VEX/priv/host_ppc_defs.h b/VEX/priv/host_ppc_defs.h index a9a9e23f67..fa5c591f80 100644 --- a/VEX/priv/host_ppc_defs.h +++ b/VEX/priv/host_ppc_defs.h @@ -1170,7 +1170,7 @@ extern HInstrArray* iselSB_PPC ( const IRSB*, /* How big is an event check? This is kind of a kludge because it depends on the offsets of host_EvC_FAILADDR and host_EvC_COUNTER. */ -extern Int evCheckSzB_PPC ( VexEndness endness_host ); +extern Int evCheckSzB_PPC (void); /* Perform a chaining and unchaining of an XDirect jump. */ extern VexInvalRange chainXDirect_PPC ( VexEndness endness_host, diff --git a/VEX/priv/host_s390_defs.c b/VEX/priv/host_s390_defs.c index ca81fa0ad2..1746baa972 100644 --- a/VEX/priv/host_s390_defs.c +++ b/VEX/priv/host_s390_defs.c @@ -9734,7 +9734,7 @@ s390_insn_evcheck_emit(UChar *buf, const s390_insn *insn, /* Make sure the size of the generated code is identical to the size returned by evCheckSzB_S390 */ - vassert(evCheckSzB_S390(endness_host) == code_end - code_begin); + vassert(evCheckSzB_S390() == code_end - code_begin); return buf; } @@ -9956,7 +9956,7 @@ emit_S390Instr(Bool *is_profinc, UChar *buf, Int nbuf, const s390_insn *insn, /* Return the number of bytes emitted for an S390_INSN_EVCHECK. See s390_insn_evcheck_emit */ Int -evCheckSzB_S390(VexEndness endness_host) +evCheckSzB_S390(void) { return s390_host_has_gie ? 18 : 24; } diff --git a/VEX/priv/host_s390_defs.h b/VEX/priv/host_s390_defs.h index c91ac5e1c2..6a29aea585 100644 --- a/VEX/priv/host_s390_defs.h +++ b/VEX/priv/host_s390_defs.h @@ -745,7 +745,7 @@ HInstrArray *iselSB_S390 ( const IRSB *, VexArch, const VexArchInfo *, const VexAbiInfo *, Int, Int, Bool, Bool, Addr); /* Return the number of bytes of code needed for an event check */ -Int evCheckSzB_S390(VexEndness endness_host); +Int evCheckSzB_S390(void); /* Perform a chaining and unchaining of an XDirect jump. */ VexInvalRange chainXDirect_S390(VexEndness endness_host, diff --git a/VEX/priv/host_x86_defs.c b/VEX/priv/host_x86_defs.c index 90f2e66531..a8a679813d 100644 --- a/VEX/priv/host_x86_defs.c +++ b/VEX/priv/host_x86_defs.c @@ -3291,7 +3291,7 @@ Int emit_X86Instr ( /*MB_MOD*/Bool* is_profInc, p = doAMode_M(p, fake(4), i->Xin.EvCheck.amFailAddr); vassert(p - p0 == 8); /* also ensures that 0x03 offset above is ok */ /* And crosscheck .. */ - vassert(evCheckSzB_X86(endness_host) == 8); + vassert(evCheckSzB_X86() == 8); goto done; } @@ -3336,7 +3336,7 @@ Int emit_X86Instr ( /*MB_MOD*/Bool* is_profInc, /* How big is an event check? See case for Xin_EvCheck in emit_X86Instr just above. That crosschecks what this returns, so we can tell if we're inconsistent. */ -Int evCheckSzB_X86 ( VexEndness endness_host ) +Int evCheckSzB_X86 (void) { return 8; } diff --git a/VEX/priv/host_x86_defs.h b/VEX/priv/host_x86_defs.h index 2d3341e24b..f51d5b07c3 100644 --- a/VEX/priv/host_x86_defs.h +++ b/VEX/priv/host_x86_defs.h @@ -746,7 +746,7 @@ extern HInstrArray* iselSB_X86 ( const IRSB*, and so assumes that they are both <= 128, and so can use the short offset encoding. This is all checked with assertions, so in the worst case we will merely assert at startup. */ -extern Int evCheckSzB_X86 ( VexEndness endness_host ); +extern Int evCheckSzB_X86 (void); /* Perform a chaining and unchaining of an XDirect jump. */ extern VexInvalRange chainXDirect_X86 ( VexEndness endness_host, diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c index f9adfaa409..b607d14b86 100644 --- a/VEX/priv/main_main.c +++ b/VEX/priv/main_main.c @@ -1080,28 +1080,27 @@ VexInvalRange LibVEX_UnChain ( VexArch arch_host, } } -Int LibVEX_evCheckSzB ( VexArch arch_host, - VexEndness endness_host ) +Int LibVEX_evCheckSzB ( VexArch arch_host ) { static Int cached = 0; /* DO NOT MAKE NON-STATIC */ if (UNLIKELY(cached == 0)) { switch (arch_host) { case VexArchX86: - cached = evCheckSzB_X86(endness_host); break; + cached = evCheckSzB_X86(); break; case VexArchAMD64: - cached = evCheckSzB_AMD64(endness_host); break; + cached = evCheckSzB_AMD64(); break; case VexArchARM: - cached = evCheckSzB_ARM(endness_host); break; + cached = evCheckSzB_ARM(); break; case VexArchARM64: - cached = evCheckSzB_ARM64(endness_host); break; + cached = evCheckSzB_ARM64(); break; case VexArchS390X: - cached = evCheckSzB_S390(endness_host); break; + cached = evCheckSzB_S390(); break; case VexArchPPC32: case VexArchPPC64: - cached = evCheckSzB_PPC(endness_host); break; + cached = evCheckSzB_PPC(); break; case VexArchMIPS32: case VexArchMIPS64: - cached = evCheckSzB_MIPS(endness_host); break; + cached = evCheckSzB_MIPS(); break; default: vassert(0); } diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h index 442ca8fb0d..3e99d47020 100644 --- a/VEX/pub/libvex.h +++ b/VEX/pub/libvex.h @@ -768,8 +768,7 @@ VexInvalRange LibVEX_UnChain ( VexArch arch_host, calculate the fast entry point address if the slow entry point address is known (the usual case), or vice versa. */ extern -Int LibVEX_evCheckSzB ( VexArch arch_host, - VexEndness endness_host ); +Int LibVEX_evCheckSzB ( VexArch arch_host ); /* Patch the counter location into an existing ProfInc point. The