From: Richard Sandiford Date: Thu, 3 Feb 2022 10:44:00 +0000 (+0000) Subject: aarch64: Remove VALL_F16MOV iterator X-Git-Tag: basepoints/gcc-13~1296 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6a770526600a7ffda1f288fa481a4322d5f149b4;p=thirdparty%2Fgcc.git aarch64: Remove VALL_F16MOV iterator The VALL_F16MOV iterator now has the same modes as VALL_F16, in the same order. This patch removes the former in favour of the latter. This doesn't fix a bug as such, but it's ultra-safe (no change in object code) and it saves a follow-up patch from having to make a false choice between the iterators. gcc/ * config/aarch64/iterators.md (VALL_F16MOV): Delete. * config/aarch64/aarch64-simd.md (mov): Use VALL_F16 instead of VALL_F16MOV. --- diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 13255be84fd2..f6d7b42c2896 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -19,8 +19,8 @@ ;; . (define_expand "mov" - [(set (match_operand:VALL_F16MOV 0 "nonimmediate_operand") - (match_operand:VALL_F16MOV 1 "general_operand"))] + [(set (match_operand:VALL_F16 0 "nonimmediate_operand") + (match_operand:VALL_F16 1 "general_operand"))] "TARGET_SIMD" " /* Force the operand into a register if it is not an diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 9160ce3e69c2..a0c02e4ac15d 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -187,11 +187,6 @@ (define_mode_iterator VALL_F16 [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V4HF V8HF V4BF V8BF V2SF V4SF V2DF]) -;; All Advanced SIMD modes suitable for moving, loading, and storing, -;; including special Bfloat vector types. -(define_mode_iterator VALL_F16MOV [V8QI V16QI V4HI V8HI V2SI V4SI V2DI - V4HF V8HF V4BF V8BF V2SF V4SF V2DF]) - ;; The VALL_F16 modes except the 128-bit 2-element ones. (define_mode_iterator VALL_F16_NO_V2Q [V8QI V16QI V4HI V8HI V2SI V4SI V4HF V8HF V2SF V4SF])