From: Jonathan Cameron Date: Sun, 8 May 2022 17:57:00 +0000 (+0100) Subject: iio: potentiometer: ad5110: Fix alignment for DMA safety X-Git-Tag: v5.18.18~433 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6a8a834ef6afc47ec92e6057e5fcbe7a72a560a6;p=thirdparty%2Fkernel%2Fstable.git iio: potentiometer: ad5110: Fix alignment for DMA safety [ Upstream commit b5841c38cb2f7e54b0787b3e0326a6b21b89ea3e ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: d03a74bfacce ("iio: potentiometer: Add driver support for AD5110") Signed-off-by: Jonathan Cameron Cc: Mugilraj Dhavachelvan Acked-by: Nuno Sá Link: https://lore.kernel.org/r/20220508175712.647246-81-jic23@kernel.org Signed-off-by: Sasha Levin --- diff --git a/drivers/iio/potentiometer/ad5110.c b/drivers/iio/potentiometer/ad5110.c index d4eeedae56e5a..8fbcce4829898 100644 --- a/drivers/iio/potentiometer/ad5110.c +++ b/drivers/iio/potentiometer/ad5110.c @@ -63,10 +63,10 @@ struct ad5110_data { struct mutex lock; const struct ad5110_cfg *cfg; /* - * DMA (thus cache coherency maintenance) requires the + * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines. */ - u8 buf[2] ____cacheline_aligned; + u8 buf[2] __aligned(IIO_DMA_MINALIGN); }; static const struct iio_chan_spec ad5110_channels[] = {