From: Eric Botcazou <ebotcazou@adacore.com>
Date: Tue, 26 Jan 2016 12:06:36 +0000 (+0000)
Subject: * config/ia64/ia64.c (ia64_expand_vecint_compare): Use gen_int_mode.
X-Git-Tag: basepoints/gcc-7~1331
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6a8b00eb9c5f4cd2859c28ee9dec16c36a302a50;p=thirdparty%2Fgcc.git

* config/ia64/ia64.c (ia64_expand_vecint_compare): Use gen_int_mode.

From-SVN: r232822
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ca46ff0bfa16..097573d87f6f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2016-01-26  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* config/ia64/ia64.c (ia64_expand_vecint_compare): Use gen_int_mode.
+
 2016-01-26  Richard Biener  <rguenther@suse.de>
 
 	PR middle-end/69467
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 33ec7a74beec..3fcc3b5385d6 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -1908,7 +1908,7 @@ ia64_expand_vecint_compare (enum rtx_code code, machine_mode mode,
 
 	    /* Subtract (-(INT MAX) - 1) from both operands to make
 	       them signed.  */
-	    mask = GEN_INT (0x80000000);
+	    mask = gen_int_mode (0x80000000, SImode);
 	    mask = gen_rtx_CONST_VECTOR (V2SImode, gen_rtvec (2, mask, mask));
 	    mask = force_reg (mode, mask);
 	    t1 = gen_reg_rtx (mode);