From: Richard Henderson Date: Sun, 9 May 2021 15:16:16 +0000 (+0200) Subject: accel/tcg: Rename tlb_flush_page_bits -> range]_by_mmuidx_async_0 X-Git-Tag: v6.1.0-rc0~103^2~97 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6be48e45ac996cb5186dc77ca91bff812ed27f85;p=thirdparty%2Fqemu.git accel/tcg: Rename tlb_flush_page_bits -> range]_by_mmuidx_async_0 Rename to match tlb_flush_range_locked. Signed-off-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-id: 20210509151618.2331764-8-f4bug@amsat.org Message-Id: <20210508201640.1045808-1-richard.henderson@linaro.org> [PMD: Split from bigger patch] Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 4b3ac7093cb..596b87c876b 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -764,9 +764,8 @@ typedef struct { uint16_t bits; } TLBFlushRangeData; -static void -tlb_flush_page_bits_by_mmuidx_async_0(CPUState *cpu, - TLBFlushRangeData d) +static void tlb_flush_range_by_mmuidx_async_0(CPUState *cpu, + TLBFlushRangeData d) { CPUArchState *env = cpu->env_ptr; int mmu_idx; @@ -793,7 +792,7 @@ static void tlb_flush_page_bits_by_mmuidx_async_2(CPUState *cpu, run_on_cpu_data data) { TLBFlushRangeData *d = data.host_ptr; - tlb_flush_page_bits_by_mmuidx_async_0(cpu, *d); + tlb_flush_range_by_mmuidx_async_0(cpu, *d); g_free(d); } @@ -824,7 +823,7 @@ void tlb_flush_range_by_mmuidx(CPUState *cpu, target_ulong addr, d.bits = bits; if (qemu_cpu_is_self(cpu)) { - tlb_flush_page_bits_by_mmuidx_async_0(cpu, d); + tlb_flush_range_by_mmuidx_async_0(cpu, d); } else { /* Otherwise allocate a structure, freed by the worker. */ TLBFlushRangeData *p = g_memdup(&d, sizeof(d)); @@ -876,7 +875,7 @@ void tlb_flush_range_by_mmuidx_all_cpus(CPUState *src_cpu, } } - tlb_flush_page_bits_by_mmuidx_async_0(src_cpu, d); + tlb_flush_range_by_mmuidx_async_0(src_cpu, d); } void tlb_flush_page_bits_by_mmuidx_all_cpus(CPUState *src_cpu,