From: Julian Seward Date: Tue, 30 Apr 2002 10:18:48 +0000 (+0000) Subject: Relax assertion to avoid this: vg_cachesim.c:402 X-Git-Tag: svn/VALGRIND_1_0_3~281 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6c89523e81a2170a9bd1d7e41169a026be8d99aa;p=thirdparty%2Fvalgrind.git Relax assertion to avoid this: vg_cachesim.c:402 (compute_BBCC_array_size): Assertion `!is_STORE && !is_FPU_R && !is_FPU_W' failed. I don't know if this is correct, but I can run kate having done so. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@171 --- diff --git a/cachegrind/cg_main.c b/cachegrind/cg_main.c index ea0cb410a2..4db78ce7e6 100644 --- a/cachegrind/cg_main.c +++ b/cachegrind/cg_main.c @@ -375,7 +375,7 @@ static Int compute_BBCC_array_size(UCodeBlock* cb) is_LOAD = is_STORE = is_FPU_R = is_FPU_W = False; for (i = 0; i < cb->used; i++) { - //VG_(ppUInstr)(0, &cb->instrs[i]); + /* VG_(ppUInstr)(0, &cb->instrs[i]); */ u_in = &cb->instrs[i]; switch(u_in->opcode) { @@ -399,7 +399,8 @@ static Int compute_BBCC_array_size(UCodeBlock* cb) case LOAD: /* Two LDBs are possible for a single instruction */ - vg_assert(/*!is_LOAD &&*/ !is_STORE && !is_FPU_R && !is_FPU_W); + vg_assert(/*!is_LOAD &&*/ /* !is_STORE && */ + !is_FPU_R && !is_FPU_W); is_LOAD = True; break; diff --git a/vg_cachesim.c b/vg_cachesim.c index ea0cb410a2..4db78ce7e6 100644 --- a/vg_cachesim.c +++ b/vg_cachesim.c @@ -375,7 +375,7 @@ static Int compute_BBCC_array_size(UCodeBlock* cb) is_LOAD = is_STORE = is_FPU_R = is_FPU_W = False; for (i = 0; i < cb->used; i++) { - //VG_(ppUInstr)(0, &cb->instrs[i]); + /* VG_(ppUInstr)(0, &cb->instrs[i]); */ u_in = &cb->instrs[i]; switch(u_in->opcode) { @@ -399,7 +399,8 @@ static Int compute_BBCC_array_size(UCodeBlock* cb) case LOAD: /* Two LDBs are possible for a single instruction */ - vg_assert(/*!is_LOAD &&*/ !is_STORE && !is_FPU_R && !is_FPU_W); + vg_assert(/*!is_LOAD &&*/ /* !is_STORE && */ + !is_FPU_R && !is_FPU_W); is_LOAD = True; break;