From: Bill Schmidt Date: Sun, 19 Apr 2015 16:53:22 +0000 (+0000) Subject: backport: re PR target/65787 (Miscompile due to bad vector swap optimization for... X-Git-Tag: releases/gcc-4.8.5~163 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6cceda4c7aa503448ffcfc1ff75a52b2826cd969;p=thirdparty%2Fgcc.git backport: re PR target/65787 (Miscompile due to bad vector swap optimization for little endian) [gcc] 2015-04-18 Bill Schmidt Jakub Jelinek Backport from mainline r222205 2015-04-17 Bill Schmidt Jakub Jelinek PR target/65787 * config/rs6000/rs6000.c (rtx_is_swappable_p): Ensure that a subsequent SH_NONE operand does not overwrite an existing *special value. (adjust_extract): Handle case where a vec_extract operation is wrapped in a PARALLEL. [gcc/testsuite] 2015-04-18 Bill Schmidt Backport from mainline r222205 2015-04-17 Bill Schmidt PR target/65787 * gcc.target/powerpc/pr65787.c: New. Co-Authored-By: Jakub Jelinek From-SVN: r222222 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2c56a7048a67..a9cc39066069 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,17 @@ +2015-04-18 Bill Schmidt + Jakub Jelinek + + Backport from mainline r222205 + 2015-04-17 Bill Schmidt + Jakub Jelinek + + PR target/65787 + * config/rs6000/rs6000.c (rtx_is_swappable_p): Ensure that a + subsequent SH_NONE operand does not overwrite an existing *special + value. + (adjust_extract): Handle case where a vec_extract operation is + wrapped in a PARALLEL. + 2015-04-02 John David Anglin * config/pa/pa.c (pa_output_move_double): Directly handle register diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index c69f3d355097..7eeb74de2ab2 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -33677,10 +33677,11 @@ rtx_is_swappable_p (rtx op, unsigned int *special) { unsigned int special_op = SH_NONE; ok &= rtx_is_swappable_p (XEXP (op, i), &special_op); + if (special_op == SH_NONE) + continue; /* Ensure we never have two kinds of special handling for the same insn. */ - if (*special != SH_NONE && special_op != SH_NONE - && *special != special_op) + if (*special != SH_NONE && *special != special_op) return 0; *special = special_op; } @@ -33689,10 +33690,11 @@ rtx_is_swappable_p (rtx op, unsigned int *special) { unsigned int special_op = SH_NONE; ok &= rtx_is_swappable_p (XVECEXP (op, i, j), &special_op); + if (special_op == SH_NONE) + continue; /* Ensure we never have two kinds of special handling for the same insn. */ - if (*special != SH_NONE && special_op != SH_NONE - && *special != special_op) + if (*special != SH_NONE && *special != special_op) return 0; *special = special_op; } @@ -33998,7 +34000,10 @@ permute_store (rtx insn) static void adjust_extract (rtx insn) { - rtx src = SET_SRC (PATTERN (insn)); + rtx pattern = PATTERN (insn); + if (GET_CODE (pattern) == PARALLEL) + pattern = XVECEXP (pattern, 0, 0); + rtx src = SET_SRC (pattern); /* The vec_select may be wrapped in a vec_duplicate for a splat, so account for that. */ rtx sel = GET_CODE (src) == VEC_DUPLICATE ? XEXP (src, 0) : src; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1d60a1edec0f..20f7e9eb9835 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2015-04-18 Bill Schmidt + + Backport from mainline r222205 + 2015-04-17 Bill Schmidt + + PR target/65787 + * gcc.target/powerpc/pr65787.c: New. + 2015-04-14 Mikael Morin PR fortran/56674 diff --git a/gcc/testsuite/gcc.target/powerpc/pr65787.c b/gcc/testsuite/gcc.target/powerpc/pr65787.c new file mode 100644 index 000000000000..c819be9a7073 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr65787.c @@ -0,0 +1,21 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler "xxsldwi \[0-9\]*,\[0-9\]*,\[0-9\]*,3" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +/* This test verifies that a vector extract operand properly has its + lane changed by the swap optimization. Element 2 of LE corresponds + to element 1 of BE. When doublewords are swapped, this becomes + element 3 of BE, so we need to shift the vector left by 3 words + to be able to extract the correct value from BE element zero. */ + +typedef float v4f32 __attribute__ ((__vector_size__ (16))); + +void foo (float); +extern v4f32 x, y; + +int main() { + v4f32 z = x + y; + foo (z[2]); +}