From: Richard Sandiford <rsandifo@gcc.gnu.org>
Date: Thu, 4 May 2017 11:03:54 +0000 (+0000)
Subject: Fix previous commit
X-Git-Tag: basepoints/gcc-9~7573
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6d0da573d22e446f7740f6340131b11f605715bc;p=thirdparty%2Fgcc.git

Fix previous commit

From-SVN: r247589
---

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 84c36a872103..6bfd86a07af4 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -2590,7 +2590,7 @@ mips_stack_address_p (rtx x, machine_mode mode)
 
   return (mips_classify_address (&addr, x, mode, false)
 	  && addr.type == ADDRESS_REG
-	  && rtx_equal_p (addr.reg, stack_pointer_rtx));
+	  && addr.reg == stack_pointer_rtx);
 }
 
 /* Return true if ADDR matches the pattern for the LWXS load scaled indexed
@@ -6098,9 +6098,7 @@ mips_function_arg_boundary (machine_mode mode, const_tree type)
 {
   unsigned int alignment;
 
-  alignment = type && mode == BLKmode
-	      ? TYPE_ALIGN (TYPE_MAIN_VARIANT (type))
-	      : GET_MODE_ALIGNMENT (mode);
+  alignment = type ? TYPE_ALIGN (type) : GET_MODE_ALIGNMENT (mode);
   if (alignment < PARM_BOUNDARY)
     alignment = PARM_BOUNDARY;
   if (alignment > STACK_BOUNDARY)
@@ -8472,6 +8470,11 @@ and_operands_ok (machine_mode mode, rtx op1, rtx op2)
 
   if (memory_operand (op1, mode))
     {
+      if (TARGET_MIPS16) {
+	struct mips_address_info addr;
+	if (!mips_classify_address (&addr, op1, mode, false))
+	  return false;
+      }
       return and_load_operand (op2, mode);
     }
   else
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 8efc48c24876..28e0a444ba9d 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -3306,12 +3306,7 @@
   switch (which_alternative)
     {
     case 0:
-    fprintf (stderr, "-----\n");
-    	 fprintf (stderr, "%d %d %d\n", satisfies_constraint_W (operands[1]), memory_operand (operands[1], SImode), stack_operand (operands[1], SImode));
-      debug_rtx (operands[1]);
-    /*
       operands[1] = gen_lowpart (QImode, operands[1]);
-      */
       return "lbu\t%0,%1";
     case 1:
       operands[1] = gen_lowpart (HImode, operands[1]);
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-pow.c b/gcc/testsuite/gcc.target/powerpc/ppc-pow.c
index 54565463ea77..df8930d26fb2 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-pow.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-pow.c
@@ -3,6 +3,7 @@
 /* Check for VSX here, even though we don't use VSX to eliminate SPE, PAIRED
    and other ppc floating point varients.  However, we need to also eliminate
    Darwin, since it doesn't like -mcpu=power6.  */
+/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
 /* { dg-options "-O2 -ffast-math -mcpu=power6 -mno-vsx -mno-altivec" } */
 /* { dg-final { scan-assembler-times "fsqrt" 3 } } */