From: balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Wed, 1 Oct 2008 00:14:39 +0000 (+0000)
Subject: x86 pextrw destination operand can be r64.
X-Git-Tag: release_0_10_0~1319
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6dc2d0daee4ca38c81b3d755ef3efd31fcd2fda2;p=thirdparty%2Fqemu.git

x86 pextrw destination operand can be r64.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5367 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-i386/translate.c b/target-i386/translate.c
index cd9cae23f54..88d0173487b 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -3452,6 +3452,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
         case 0x1c5:
             if (mod != 3)
                 goto illegal_op;
+            ot = (s->dflag == 2) ? OT_QUAD : OT_LONG;
             val = ldub_code(s->pc++);
             if (b1) {
                 val &= 7;
@@ -3465,7 +3466,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
                                 offsetof(CPUX86State,fpregs[rm].mmx.MMX_W(val)));
             }
             reg = ((modrm >> 3) & 7) | rex_r;
-            gen_op_mov_reg_T0(OT_LONG, reg);
+            gen_op_mov_reg_T0(ot, reg);
             break;
         case 0x1d6: /* movq ea, xmm */
             if (mod != 3) {