From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 14 Jul 2025 17:23:04 +0000 (-0700)
Subject: venice: display DRAM MR registers and decoding if debug enabled
X-Git-Tag: v2025.10-rc1~53^2
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6dc91a840810b7a35c78ac14e9868db462ae2039;p=thirdparty%2Fu-boot.git

venice: display DRAM MR registers and decoding if debug enabled

While this is interesting and useful for debugging there isn't extremely
useful information so we will only show it if debug is enabled.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---

diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index d9bc593fa0d..2c303211d32 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -271,7 +271,65 @@ void board_init_f(ulong dummy)
 		       dram_timing->fsp_msg[0].drate,
 		       dram_timing->fsp_msg[0].drate / 2,
 		       dram_desc[0] ? dram_desc : "");
-		puts("\n");
+
+#ifdef DEBUG
+		u8 mr[9] = { 0 };
+		/* Read MR5-MR8 to obtain details about DRAM part (and verify DRAM working) */
+		for (i = 5; i < 9; i++)
+			mr[i] = lpddr4_mr_read(0xf, i) & 0xff;
+
+		printf(" (0x%02x%02x%02x%02x", mr[5], mr[6], mr[7], mr[8]);
+		/* MR5 MFG_ID */
+		switch (mr[5]) {
+		case 0xff:
+			printf(" Micron");
+			break;
+		default:
+			break;
+		}
+		/* MR8 OP[7:6] Width */
+		i = 0;
+		switch ((mr[8] >> 6) & 0x3) {
+		case 0:
+			i = 16;
+			break;
+		case 1:
+			i = 8;
+			break;
+		}
+		if (i)
+			printf(" x%d", i);
+		/* MR8 OP[5:2] Density */
+		i = 0;
+		switch ((mr[8] >> 2) & 0xf) {
+		case 0:
+			i = 4;
+			break;
+		case 1:
+			i = 6;
+			break;
+		case 2:
+			i = 8;
+			break;
+		case 3:
+			i = 12;
+			break;
+		case 4:
+			i = 16;
+			break;
+		case 5:
+			i = 24;
+			break;
+		case 6:
+			i = 32;
+			break;
+		default:
+			break;
+		}
+		if (i)
+			printf(" %dGb per die", i);
+#endif
+		puts(")\n");
 	} else {
 		hang();
 	}