From: Nicholas Susanto Date: Fri, 7 Jun 2024 18:39:01 +0000 (-0400) Subject: drm/amd/display: Temporarily disable HPO PG on DCN35 X-Git-Tag: v6.11-rc1~141^2~8^2~74 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6e3eb2766731c6bd2bfae5a0fbb538ec85e7e822;p=thirdparty%2Fkernel%2Fstable.git drm/amd/display: Temporarily disable HPO PG on DCN35 [WHY] On hotpluggin a 4k144 HDMI FRL setup, display fails FRL link training and falls back to TMDS which is caused by driver not ungating HPO before doing FRL link training. [HOW] Enable debug flag to disable HPO power gate in DCN35 Reviewed-by: Nicholas Kazlauskas Reviewed-by: Charlene Liu Signed-off-by: Alex Hung Signed-off-by: Nicholas Susanto Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c index 0094ef223c5d2..67ab8c1962ff4 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c @@ -721,7 +721,7 @@ static const struct dc_debug_options debug_defaults_drv = { .disable_dpp_power_gate = true, .disable_hubp_power_gate = true, .disable_optc_power_gate = true, /*should the same as above two*/ - .disable_hpo_power_gate = false, /*dmubfw force domain25 on*/ + .disable_hpo_power_gate = true, /*dmubfw force domain25 on*/ .disable_clock_gate = false, .disable_dsc_power_gate = true, .vsr_support = true,