From: Marc Zyngier <maz@kernel.org>
Date: Fri, 20 Aug 2021 10:49:23 +0000 (+0100)
Subject: Merge branch arm64/for-next/sysreg into kvm-arm64/misc-5.15
X-Git-Tag: v5.15-rc1~65^2~4^2~7^2
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6e73bc90ec447b8fcec5fd22fa49e100f3b4f909;p=thirdparty%2Flinux.git

Merge branch arm64/for-next/sysreg into kvm-arm64/misc-5.15

Merge the arm64/for-next/sysreg branch to avoid merge conflicts
in -next and upstream.

* arm64/for-next/sysreg:
  arm64/kexec: Test page size support with new TGRAN range values

Signed-off-by: Marc Zyngier <maz@kernel.org>
---

6e73bc90ec447b8fcec5fd22fa49e100f3b4f909
diff --cc arch/arm64/include/asm/sysreg.h
index 1972e4b9be5c0,aa53954c2f6b9..2084b22613e2a
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@@ -847,17 -847,16 +847,21 @@@
  #define ID_AA64MMFR0_ASID_SHIFT		4
  #define ID_AA64MMFR0_PARANGE_SHIFT	0
  
- #define ID_AA64MMFR0_TGRAN4_NI		0xf
- #define ID_AA64MMFR0_TGRAN4_SUPPORTED	0x0
- #define ID_AA64MMFR0_TGRAN64_NI		0xf
- #define ID_AA64MMFR0_TGRAN64_SUPPORTED	0x0
- #define ID_AA64MMFR0_TGRAN16_NI		0x0
- #define ID_AA64MMFR0_TGRAN16_SUPPORTED	0x1
+ #define ID_AA64MMFR0_TGRAN4_NI			0xf
+ #define ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN	0x0
+ #define ID_AA64MMFR0_TGRAN4_SUPPORTED_MAX	0x7
+ #define ID_AA64MMFR0_TGRAN64_NI			0xf
+ #define ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN	0x0
+ #define ID_AA64MMFR0_TGRAN64_SUPPORTED_MAX	0x7
+ #define ID_AA64MMFR0_TGRAN16_NI			0x0
+ #define ID_AA64MMFR0_TGRAN16_SUPPORTED_MIN	0x1
+ #define ID_AA64MMFR0_TGRAN16_SUPPORTED_MAX	0xf
+ 
 +#define ID_AA64MMFR0_PARANGE_32		0x0
 +#define ID_AA64MMFR0_PARANGE_36		0x1
 +#define ID_AA64MMFR0_PARANGE_40		0x2
 +#define ID_AA64MMFR0_PARANGE_42		0x3
 +#define ID_AA64MMFR0_PARANGE_44		0x4
  #define ID_AA64MMFR0_PARANGE_48		0x5
  #define ID_AA64MMFR0_PARANGE_52		0x6
  
@@@ -1035,19 -1032,16 +1039,19 @@@
  
  #if defined(CONFIG_ARM64_4K_PAGES)
  #define ID_AA64MMFR0_TGRAN_SHIFT		ID_AA64MMFR0_TGRAN4_SHIFT
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	ID_AA64MMFR0_TGRAN4_SUPPORTED_MAX
 +#define ID_AA64MMFR0_TGRAN_2_SHIFT		ID_AA64MMFR0_TGRAN4_2_SHIFT
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN4_SUPPORTED
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	0x7
  #elif defined(CONFIG_ARM64_16K_PAGES)
  #define ID_AA64MMFR0_TGRAN_SHIFT		ID_AA64MMFR0_TGRAN16_SHIFT
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN16_SUPPORTED_MIN
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	ID_AA64MMFR0_TGRAN16_SUPPORTED_MAX
 +#define ID_AA64MMFR0_TGRAN_2_SHIFT		ID_AA64MMFR0_TGRAN16_2_SHIFT
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN16_SUPPORTED
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	0xF
  #elif defined(CONFIG_ARM64_64K_PAGES)
  #define ID_AA64MMFR0_TGRAN_SHIFT		ID_AA64MMFR0_TGRAN64_SHIFT
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN
+ #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	ID_AA64MMFR0_TGRAN64_SUPPORTED_MAX
 +#define ID_AA64MMFR0_TGRAN_2_SHIFT		ID_AA64MMFR0_TGRAN64_2_SHIFT
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN64_SUPPORTED
- #define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	0x7
  #endif
  
  #define MVFR2_FPMISC_SHIFT		4