From: Ze Huang Date: Sun, 11 Jan 2026 06:41:03 +0000 (+0800) Subject: riscv: dts: spacemit: Add DWC3 USB 3.0 controller node for K1 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6e8dcd141833a23d7117fe16896f6d5dfdb2e112;p=thirdparty%2Fkernel%2Flinux.git riscv: dts: spacemit: Add DWC3 USB 3.0 controller node for K1 Add node for the Synopsys DWC3 USB 3.0 host controller on the K1 SoC. The controller resides on the 'storage-bus' and uses its DMA translations. Tested-by: Aurelien Jarno Signed-off-by: Ze Huang Reviewed-by: Yixun Lan Link: https://lore.kernel.org/r/20260111-k1-usb3dts-v2-v3-2-f5ebd546e904@linux.dev Signed-off-by: Yixun Lan --- diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index fdf7ebac05907..75877434f9f7e 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -1170,6 +1170,30 @@ #size-cells = <2>; dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; + usb_dwc3: usb@c0a00000 { + compatible = "spacemit,k1-dwc3"; + reg = <0x0 0xc0a00000 0x0 0x10000>; + clocks = <&syscon_apmu CLK_USB30>; + clock-names = "usbdrd30"; + interrupts = <125>; + phys = <&usbphy2>, <&combo_phy PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + phy_type = "utmi"; + resets = <&syscon_apmu RESET_USB30_AHB>, + <&syscon_apmu RESET_USB30_VCC>, + <&syscon_apmu RESET_USB30_PHY>; + reset-names = "ahb", "vcc", "phy"; + reset-delay = <2>; + snps,hsphy_interface = "utmi"; + snps,dis_enblslpm_quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,dis_rxdet_inp3_quirk; + status = "disabled"; + }; + emmc: mmc@d4281000 { compatible = "spacemit,k1-sdhci"; reg = <0x0 0xd4281000 0x0 0x200>;