From: Richard Henderson Date: Thu, 30 Jul 1998 19:12:16 +0000 (-0700) Subject: alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN. X-Git-Tag: prereleases/egcs-1.1-prerelease~124 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6efbfd6c37747a6f968d9f7c4a896914ab79145d;p=thirdparty%2Fgcc.git alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN. * alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN. (fcmov): Remove ALPHA_TP_INSN patterns -- fcmov doesn't trap. From-SVN: r21500 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e64bdad098c1..cc357f6e9f90 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Thu Jul 30 19:11:30 1998 Richard Henderson + + * alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN. + (fcmov): Remove ALPHA_TP_INSN patterns -- fcmov doesn't trap. + Thu Jul 30 12:51:09 1998 Mark Mitchell * dyn-string.h: New file. diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 77c0028b7e61..87ebf95e168f 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -2729,6 +2729,17 @@ [(set_attr "type" "fadd") (set_attr "trap" "yes")]) +(define_insn "" + [(set (match_operand:DF 0 "register_operand" "=&f") + (match_operator:DF 1 "alpha_comparison_operator" + [(float_extend:DF + (match_operand:SF 2 "reg_or_fp0_operand" "fG")) + (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))] + "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "cmp%-%C1%' %R2,%R3,%0" + [(set_attr "type" "fadd") + (set_attr "trap" "yes")]) + (define_insn "" [(set (match_operand:DF 0 "register_operand" "=f") (match_operator:DF 1 "alpha_comparison_operator" @@ -2740,6 +2751,17 @@ [(set_attr "type" "fadd") (set_attr "trap" "yes")]) +(define_insn "" + [(set (match_operand:DF 0 "register_operand" "=&f") + (match_operator:DF 1 "alpha_comparison_operator" + [(match_operand:DF 2 "reg_or_fp0_operand" "fG") + (float_extend:DF + (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] + "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "cmp%-%C1%' %R2,%R3,%0" + [(set_attr "type" "fadd") + (set_attr "trap" "yes")]) + (define_insn "" [(set (match_operand:DF 0 "register_operand" "=f") (match_operator:DF 1 "alpha_comparison_operator" @@ -2752,30 +2774,28 @@ (set_attr "trap" "yes")]) (define_insn "" - [(set (match_operand:DF 0 "register_operand" "=f") + [(set (match_operand:DF 0 "register_operand" "=&f") (match_operator:DF 1 "alpha_comparison_operator" [(float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG")) (float_extend:DF (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_tp == ALPHA_TP_INSN" "cmp%-%C1%' %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) (define_insn "" - [(set (match_operand:DF 0 "register_operand" "=&f,f") - (if_then_else:DF - (match_operator 3 "signed_comparison_operator" - [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG") - (match_operand:DF 2 "fp0_operand" "G,G")]) - (match_operand:DF 1 "reg_or_fp0_operand" "fG,0") - (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" - "@ - fcmov%C3 %R4,%R1,%0 - fcmov%D3 %R4,%R5,%0" - [(set_attr "type" "fcmov")]) + [(set (match_operand:DF 0 "register_operand" "=f") + (match_operator:DF 1 "alpha_comparison_operator" + [(float_extend:DF + (match_operand:SF 2 "reg_or_fp0_operand" "fG")) + (float_extend:DF + (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] + "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "cmp%-%C1%' %R2,%R3,%0" + [(set_attr "type" "fadd") + (set_attr "trap" "yes")]) (define_insn "" [(set (match_operand:DF 0 "register_operand" "=f,f") @@ -2785,21 +2805,7 @@ (match_operand:DF 2 "fp0_operand" "G,G")]) (match_operand:DF 1 "reg_or_fp0_operand" "fG,0") (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" - "@ - fcmov%C3 %R4,%R1,%0 - fcmov%D3 %R4,%R5,%0" - [(set_attr "type" "fcmov")]) - -(define_insn "" - [(set (match_operand:SF 0 "register_operand" "=&f,f") - (if_then_else:SF - (match_operator 3 "signed_comparison_operator" - [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG") - (match_operand:DF 2 "fp0_operand" "G,G")]) - (match_operand:SF 1 "reg_or_fp0_operand" "fG,0") - (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0" @@ -2813,7 +2819,7 @@ (match_operand:DF 2 "fp0_operand" "G,G")]) (match_operand:SF 1 "reg_or_fp0_operand" "fG,0") (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0" @@ -2827,7 +2833,7 @@ (match_operand:DF 2 "fp0_operand" "G,G")]) (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG,0")) (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0" @@ -2842,7 +2848,7 @@ (match_operand:DF 2 "fp0_operand" "G,G")]) (match_operand:DF 1 "reg_or_fp0_operand" "fG,0") (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0" @@ -2857,7 +2863,7 @@ (match_operand:DF 2 "fp0_operand" "G,G")]) (match_operand:SF 1 "reg_or_fp0_operand" "fG,0") (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0" @@ -2872,7 +2878,7 @@ (match_operand:DF 2 "fp0_operand" "G,G")]) (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG,0")) (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0"